公开(公告)号：US09935173B1

公开(公告)日：2018-04-03

申请号：US15363455

申请日：2016-11-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chung-Chiang Wu ,  Chia-Ching Lee ,  Hsueh-Wen Tsau ,  Chun-Yuan Chou ,  Ching-Hwanq Su

IPC: H01L21/8234 ,  H01L29/49 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28 ,  H01L21/762 ,  H01L29/06

CPC classification number: H01L29/4966 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/76254 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/0649 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/24 ,  H01L29/267 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: Structures and formation methods of a semiconductor device structure are provided. A method for forming a semiconductor device structure includes patterning a semiconductor substrate to form a fin structure. The method also includes forming a sacrificial material over the fin structure. The method further includes forming spacer elements adjoining sidewalls of the sacrificial material. Furthermore, the method includes removing the sacrificial material so that a trench is formed between the spacer elements. The method also includes forming a gate dielectric layer in the trench. The method further includes forming a work function layer in the trench to cover the gate dielectric layer. In addition, the method includes depositing a tungsten bulk layer with a precursor to fill the trench. The precursor includes a tungsten-containing material that is substantially free of fluoride.

公开(公告)号：US10985265B2

公开(公告)日：2021-04-20

申请号：US16548446

申请日：2019-08-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Liang Cheng ,  I-Ming Chang ,  Hsiang-Pi Chang ,  Hsueh-Wen Tsau ,  Ziwei Fang ,  Huang-Lin Chao

IPC: H01L29/66 ,  H01L29/78

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor layer on a semiconductor substrate, forming an interfacial layer on the semiconductor layer, forming a first gate dielectric layer on the interfacial layer, introducing fluorine on the first gate dielectric layer, annealing the first gate dielectric layer, forming a second gate dielectric layer on the first gate dielectric layer, introducing fluorine on the second gate dielectric layer, annealing the second gate dielectric layer, and forming a gate stack structure on the second gate dielectric layer.

公开(公告)号：US09824969B1

公开(公告)日：2017-11-21

申请号：US15154989

申请日：2016-05-14

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Chiang Wu ,  Chia-Ching Lee ,  Hsueh-Wen Tsau ,  Chun-Yuan Chou ,  Cheng-Yen Tsai ,  Da-Yuan Lee ,  Ming-Hsing Tsai

IPC: H01L23/52 ,  H01L21/4763 ,  H01L21/44 ,  H01L29/66 ,  H01L23/528 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L29/49

CPC classification number: H01L23/528 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/76861 ,  H01L21/76879 ,  H01L23/485 ,  H01L23/53228 ,  H01L23/53257 ,  H01L23/53261 ,  H01L29/4966

Abstract: A semiconductor structure and the method of forming the same are provided. The method of forming a semiconductor structure includes forming a recess feature in a basal layer, forming a metal layer on the basal layer, exposing the metal layer to a tungsten halide gas to form an oxygen-deficient metal layer, and forming a bulk tungsten layer on the oxygen-deficient metal layer.

公开(公告)号：US11038029B2

公开(公告)日：2021-06-15

申请号：US16277262

申请日：2019-02-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsueh-Wen Tsau ,  Chun-I Wu ,  Ziwei Fang ,  Huang-Lin Chao ,  I-Ming Chang ,  Chung-Liang Cheng ,  Chih-Cheng Lin

IPC: H01L29/40 ,  H01L29/78 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L29/423 ,  H01L29/49 ,  H01L21/28 ,  H01L29/66 ,  H01L21/285 ,  H01L29/06

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a substrate and an insulating layer over the substrate. The insulating layer has a trench partially exposing the substrate. The method includes forming a gate dielectric layer in the trench. The method includes forming a first metal-containing layer over the gate dielectric layer. The method includes forming a silicon-containing layer over the first metal-containing layer. The method includes forming a second metal-containing layer over the silicon-containing layer. The method includes forming a gate electrode layer in the trench and over the second metal-containing layer.

公开(公告)号：US10170417B2

公开(公告)日：2019-01-01

申请号：US15817281

申请日：2017-11-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Chiang Wu ,  Chia-Ching Lee ,  Hsueh-Wen Tsau ,  Chun-Yuan Chou ,  Cheng-Yen Tsai ,  Da-Yuan Lee ,  Ming-Hsing Tsai

IPC: H01L27/092 ,  H01L21/28 ,  H01L21/8238 ,  H01L21/321 ,  H01L23/528 ,  H01L21/311 ,  H01L21/768 ,  H01L23/532 ,  H01L29/49 ,  H01L23/485

Abstract: A semiconductor structure includes a substrate, a dielectric layer, a metal layer, and a tungsten layer. The dielectric layer is on the substrate and has a recess feature therein. The metal layer is in the recess feature. The metal layer has an oxygen content less than about 0.1 atomic percent. The tungsten layer is in the recess feature and in contact with the metal layer.