公开(公告)号：US07442593B2

公开(公告)日：2008-10-28

申请号：US11480912

申请日：2006-07-06

申请人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

发明人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L21/28097 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/823437 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53271 ,  H01L28/40 ,  H01L29/4925 ,  H01L29/4975 ,  H01L2924/0002 ,  Y10T117/10 ,  Y10T117/1004 ,  H01L2924/00

摘要： In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material. In this case, depositing of the amorphous layers is carried out dividedly by a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and the process of crystallizing the amorphous material are repeated, whereby a laminated structure of the polycrystalline layer 6 having a necessary film thickness is obtained. With the above-described arrangement, it is possible to prevent a deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.

摘要翻译： 在半导体衬底4上的氧化硅膜5上通过氧化硅膜5形成电极2时，例如，栅电极2被构成为多个多晶硅层6的叠层结构。 栅电极2的部分通过制造具有沉积非晶层的工艺的薄膜的方法和使该非晶材料结晶（再结晶）的方法形成。 在这种情况下，非晶层的沉积被分开多次进行，使得一次沉积的非晶层的厚度不大于根据根据下式确定的临界应力值规定的厚度 在每个非晶层的沉积过程完成之后，非晶材料结晶，重复沉积非晶层的过程和结晶非晶材料的过程，由此多晶层6的层压结构具有必要的 获得膜厚度。 利用上述结构，可以防止半导体器件的电特性的恶化和层之间的剥离等缺陷的发生，层中的裂纹等，并且可以获得 通过多晶材料的层叠，具有所需膜厚度的小晶粒尺寸的多晶层。

公开(公告)号：US07158124B2

公开(公告)日：2007-01-02

申请号：US10372174

申请日：2003-02-25

申请人： Takashi Nakajima

发明人： Takashi Nakajima

IPC分类号： G09G5/00

CPC分类号： G06F3/041

摘要： External connection terminals are placed within an outline of a touch panel body by being concentrated in an area neighboring an edge of a touch panel body on one of an upper surface and an under surface thereof. When the external connection terminals are concentrated on a side end surface of the touch panel body, the external connection terminals are also placed within the outline of the touch panel body. The touch panel body is also provided with a handle portion.

摘要翻译： 外部连接端子通过集中在触摸面板主体的与其上表面和下表面中的一个的边缘相邻的区域中而放置在触摸面板主体的轮廓内。 当外部连接端子集中在触摸面板主体的侧端面上时，外部连接端子也被放置在触摸面板主体的轮廓内。 触摸面板主体还设置有把手部分。

公开(公告)号：US07091520B2

公开(公告)日：2006-08-15

申请号：US10265105

申请日：2002-10-07

申请人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

发明人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

IPC分类号： H01L29/10

CPC分类号： H01L21/28097 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/823437 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53271 ,  H01L28/40 ,  H01L29/4925 ,  H01L29/4975 ,  H01L2924/0002 ,  Y10T117/10 ,  Y10T117/1004 ,  H01L2924/00

摘要： In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material. In this case, depositing of the amorphous layers is carried out dividedly by a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and the process of crystallizing the amorphous material are repeated, whereby a laminated structure of the polycrystalline layer 6 having a necessary film thickness is obtained. With the above-described arrangement, it is possible to prevent a deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.

摘要翻译： 在半导体衬底4上的氧化硅膜5上通过氧化硅膜5形成电极2时，例如，栅电极2被构成为多个多晶硅层6的叠层结构。 栅电极2的部分通过制造具有沉积非晶层的工艺的薄膜的方法和使该非晶材料结晶（再结晶）的方法形成。 在这种情况下，非晶层的沉积被分开多次进行，使得一次沉积的非晶层的厚度不大于根据根据下式确定的临界应力值规定的厚度 在每个非晶层的沉积过程完成之后，非晶材料结晶，重复沉积非晶层的过程和结晶非晶材料的过程，由此多晶层6的层压结构具有必要的 获得膜厚度。 利用上述结构，可以防止半导体器件的电特性的恶化和层之间的剥离等缺陷的发生，层中的裂纹等，并且可以获得 通过多晶材料的层叠，具有所需膜厚度的小晶粒尺寸的多晶层。

公开(公告)号：US06784549B2

公开(公告)日：2004-08-31

申请号：US10395248

申请日：2003-03-25

申请人： Tomio Iwasaki ,  Hideo Miura ,  Takashi Nakajima ,  Hiroyuki Ohta ,  Shinji Nishihara ,  Masashi Sahara

发明人： Tomio Iwasaki ,  Hideo Miura ,  Takashi Nakajima ,  Hiroyuki Ohta ,  Shinji Nishihara ,  Masashi Sahara

IPC分类号： H01L2348

CPC分类号： H01L23/53257 ,  H01L27/10814 ,  H01L27/10894 ,  H01L28/55 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, which comprises a capacitor component comprising a first electrode, an oxide film with a high dielectric constant or ferroelectricity in contact with the first electrode and a second electrode in contact with the oxide film, as formed in this order, on one principal side of a silicon substrate with a metal wiring layer formed thereon, such problems as breaking of tungsten interconnect, lowering of reliability, lowering of yield, etc. of semi-conductor devices can be solved by using molybdenum-containing tungsten as the material of metal interconnect layer.

摘要翻译： 在包括第一电极的电容器组件，具有高介电常数或与第一电极接触的铁电性的氧化膜和与该氧化物膜接触的第二电极的电容器组件中， 在其上形成有金属布线层的硅衬底的主面上，通过使用含钼钨作为材料，可以解决半导体器件的钨互连断裂，可靠性降低，成品率降低等问题 金属互连层。

公开(公告)号：US06601833B2

公开(公告)日：2003-08-05

申请号：US09864600

申请日：2001-05-23

申请人： Ryuzo Takai ,  Takashi Nakajima ,  Hiroaki Takahata ,  Kimiko Otani

发明人： Ryuzo Takai ,  Takashi Nakajima ,  Hiroaki Takahata ,  Kimiko Otani

IPC分类号： B01F304

CPC分类号： B65D85/73 ,  A47G19/2233 ,  Y10S261/07

摘要： A container for a sparkling beverage which includes, on its inside bottom portion or surface, a bubble generator having a bubble generating portion for generating bubbles in such a manner that an aggregation of bubbles forms substantially the same shape as a mark on the surface of a beverage.

摘要翻译： 一种用于泡沫饮料的容器，在其内部底部或表面上包括具有气泡生成部分的气泡发生器，该气泡发生器以这样的方式产生气泡，使得气泡的聚集形成与表面上的标记基本相同的形状 饮料。

公开(公告)号：US06388784B1

公开(公告)日：2002-05-14

申请号：US08928225

申请日：1997-09-12

申请人： Makoto Nakamura ,  Yoshihiro Ohtani ,  Hiroshi Uno ,  Tsukasa Kaminokado ,  Hiroyuki Nakaoka ,  Yutaka Ikeda ,  Takashi Nakajima

发明人： Makoto Nakamura ,  Yoshihiro Ohtani ,  Hiroshi Uno ,  Tsukasa Kaminokado ,  Hiroyuki Nakaoka ,  Yutaka Ikeda ,  Takashi Nakajima

IPC分类号： H04B1000

CPC分类号： H04L25/4902

摘要： A digital optical transmitter includes a main/subdata modulation part for distorting a main data modulated signal waveform in response to sub-data, and an E/O conversion part for converting a subsequently obtained electrical modulated signal to an optical modulated signal and outputting the optical modulated signal. A digital optical receiver includes an O/E conversion part for receiving the optical modulated signal, converting it to an electrical modulated signal, and outputting the electrical modulated signal. Additionally, the digital optical receiver further includes a main/subdata demodulation part for demodulating the main data from the electrical modulated signal, while detecting whether or not a distortion signal responsive to the subdata is superposed on a subcarrier which forms the electrical modulated signal. If the distortion signal is superposed on a subcarrier, the main/subdata demodulator part demodulates the associated subdata.

摘要翻译： 一种数字光发射机，包括用于响应子数据使主数据调制信号波形失真的主/子数据调制部分和用于将随后获得的电调制信号转换为光调制信号的E / O转换部分，并输出光 调制信号。 数字光接收机包括用于接收光调制信号的O / E转换部分，将其转换为电调制信号，并输出电调制信号。 此外，数字光接收机还包括主/副数据解调部分，用于从电调制信号中解调主数据，同时检测响应于子数据的失真信号是否叠加在形成电调制信号的子载波上。 如果失真信号叠加在子载波上，则主/分解调制器部分解调相关的子数据。

公开(公告)号：US06346731B1

公开(公告)日：2002-02-12

申请号：US09499898

申请日：2000-02-08

申请人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

发明人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

IPC分类号： H02L2976

CPC分类号： H01L21/28097 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/823437 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53271 ,  H01L28/40 ,  H01L29/4925 ,  H01L29/4975 ,  H01L2924/0002 ,  Y10T117/10 ,  Y10T117/1004 ,  H01L2924/00

摘要： In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material. In this case, depositing of the amorphous layers is carried out dividedly by a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and the process of crystallizing the amorphous material are repeated, whereby a laminated structure of the polycrystalline layer 6 having a necessary film thickness is obtained. With the above-described arrangement, it is possible to prevent a deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.

摘要翻译： 例如，通过氧化硅膜5在半导体衬底4上的氧化硅膜5上形成电极2时，栅电极2被构成为多个多晶硅层6的层叠结构。栅极部分 通过制造具有沉积非晶层的工艺的薄膜的方法和使该非晶材料结晶（再结晶）的方法形成电极2。 在这种情况下，非晶层的沉积被分开多次进行，使得一次沉积的非晶层的厚度不大于根据根据下式确定的临界应力值规定的厚度 在每个非晶层的沉积过程完成之后，非晶材料结晶，重复沉积非晶层的过程和结晶非晶材料的过程，由此多晶层6的层压结构具有必要的 获得膜厚度。 利用上述结构，可以防止半导体器件的电特性的恶化和层之间的剥离等缺陷的发生，层中的裂纹等，并且可以获得 通过多晶材料的层叠，具有所需膜厚度的小晶粒尺寸的多晶层。

公开(公告)号：US06326103B1

公开(公告)日：2001-12-04

申请号：US09274834

申请日：1999-03-23

申请人： Isao Ido ,  Takashi Nakajima

发明人： Isao Ido ,  Takashi Nakajima

IPC分类号： H01M642

CPC分类号： H01M2/024 ,  B60K1/04 ,  H01M2/0245 ,  H01M2/1077 ,  H01M10/613 ,  H01M10/617 ,  H01M10/647 ,  H01M10/6556 ,  H01M10/6562 ,  H01M10/6566

摘要： The present invention provides a modular system for accommodating batteries therein, which has a simple structure and a high reliability and prevents a difference in properties between the batteries included therein. The modular system includes a plurality of single batteries 1, which are arranged side by side between the beams of a top plate 21 and a bottom plate 22 to locate covers of the batteries 1 with terminals on a front side of the top plate 21 and the bottom plate 22. The single battery 1 has a plurality of ribs 12 that are formed on a specific pair of opposite outer surfaces in such a manner as to extend in a longitudinal direction of the single battery 1, and have concaves formed at regular intervals. The plurality of ribs 12 formed on each outer surface of each single battery 1 are in contact and joined with the plurality of ribs 12 formed on a matching outer surface of an adjoining single battery 1. The joint surfaces of the adjacent single batteries 1 form connection grooves 13 that are defined by the concaves of the ribs 12 and extend perpendicularly to the top plate 21 and the bottom plate 22.

摘要翻译： 本发明提供了一种用于在其中容纳电池的模块化系统，其具有简单的结构和高可靠性，并且防止其中包括的电池之间的性能差异。 模块化系统包括多个单电池1，它们并排布置在顶板21和底板22的梁之间，以将电池1的盖子定位在顶板21的前侧上的端子和 单电池1具有多个肋12，其形成在特定的一对相对的外表面上，以便在单个电池1的纵向方向上延伸，并且具有以规则间隔形成的凹部。 形成在每个单电池1的每个外表面上的多个肋12与形成在邻接的单个电池1的匹配外表面上的多个肋12接触并接合。相邻的单个电池1的接合表面形成连接 槽13由肋12的凹部限定并且垂直于顶板21和底板22延伸。

公开(公告)号：US6118140A

公开(公告)日：2000-09-12

申请号：US749324

申请日：1996-11-14

申请人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

发明人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

IPC分类号： H01L21/02 ,  H01L23/532 ,  H01L29/49 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01L21/28097 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/823437 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53271 ,  H01L28/40 ,  H01L29/4925 ,  H01L29/4975 ,  H01L2924/0002 ,  Y10T117/10 ,  Y10T117/1004

摘要： In forming an electrode on a silicon oxide film on a semiconductor substrate through a silicon oxide film, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers. The portion of the gate electrode is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and of crystallizing (recrystallizing) this amorphous material. Depositing of the amorphous layers is carried out a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and crystallizing the amorphous material are repeated, whereby a laminated structure of polycrystalline layers having a necessary film thickness is obtained. It is possible to prevent deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.

摘要翻译： 在通过氧化硅膜在半导体衬底上形成氧化硅膜上的电极时，例如，栅电极2被构造成多个多晶硅层的叠层结构。 栅电极的部分通过制造具有沉积非晶层并使（非晶态）结晶（再结晶））的方法的薄膜的制造方法形成。 非晶层的沉积进行多次，使得一次沉积的非晶层的厚度不大于根据失败事件确定的临界应力值规定的厚度，非晶材料 在沉积每个非晶层的每个工艺完成后结晶，并且重复沉积非晶层并使无定形材料结晶的过程，从而获得具有所需膜厚度的多晶层的层叠结构。 可以防止半导体器件的电特性的劣化和层之间的剥离等缺陷的发生，层中的裂纹等的发生，并且可以获得小晶粒尺寸的多晶层 通过层压多晶材料制成所需的膜厚度。

公开(公告)号：US6043142A

公开(公告)日：2000-03-28

申请号：US985179

申请日：1997-12-04

申请人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

发明人： Takashi Nakajima ,  Hideo Miura ,  Hiroyuki Ohta ,  Noriaki Okamoto

IPC分类号： H01L21/02 ,  H01L23/532 ,  H01L29/49 ,  H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/28097 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76877 ,  H01L21/823437 ,  H01L23/485 ,  H01L23/53257 ,  H01L23/53271 ,  H01L28/40 ,  H01L29/4925 ,  H01L29/4975 ,  H01L2924/0002 ,  Y10T117/10 ,  Y10T117/1004

摘要： In forming an electrode 2 on a silicon oxide film 5 on a semiconductor substrate 4 through a silicon oxide film 5, for example, the gate electrode 2 is structured in a laminated structure of a plurality of polycrystalline silicon layers 6. The portion of the gate electrode 2 is formed by a method of manufacturing a thin film having a process of depositing amorphous layers and a process of crystallizing (recrystallizing) this amorphous material. In this case, depositing of the amorphous layers is carried out dividedly by a plurality of times so that the thickness of an amorphous layer to be deposited at one time is not larger than a thickness to be prescribed by a critical stress value determined according to a fail event, the amorphous material is crystallized after each process of depositing each amorphous layer has been finished, and the process of depositing amorphous layers and the process of crystallizing the amorphous material are repeated, whereby a laminated structure of the polycrystalline layer 6 having a necessary film thickness is obtained. With the above-described arrangement, it is possible to prevent a deterioration of electric characteristics of a semiconductor device and an occurrence of a defect, such as a peeling off between layers, cracks in a layer, etc., and it is possible to obtain a polycrystalline layer of small grain size in a desired film thickness by a lamination of polycrystalline materials.