公开(公告)号：US06950327B2

公开(公告)日：2005-09-27

申请号：US10686583

申请日：2003-10-17

申请人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

发明人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： In a ferroelectric capacitor, two displacements (points b and c) of a remanent polarization correspond to data “1” and one displacement (point a) of the remanent polarization corresponds to data “0”. When the data “1” is written, either of two electric voltage pulses different in potential or in pulse width is applied to the ferroelectric capacitor to position the displacement of the remanent polarization in the ferroelectric capacitor at the point b or at the point c. When the data “0” is written, on the other hand, the displacement of the remanent polarization in the ferroelectric capacitor is positioned at the point a.

摘要翻译： 在铁电电容器中，剩余极化的两个位移（点b和c）对应于数据“1”，剩余极化的一个位移（点a）对应于数据“0”。 当写入数据“1”时，电压或脉冲宽度不同的两个电压脉冲中的任一个施加到铁电电容器，以将铁电电容器中剩余极化的位移定位在点b处或点c处。 另一方面，当写入数据“0”时，铁电电容器中剩余极化的位移位于点a处。

公开(公告)号：US06853576B2

公开(公告)日：2005-02-08

申请号：US10653201

申请日：2003-09-03

申请人： Yoshihisa Kato ,  Yasuhiro Shimada ,  Takayoshi Yamada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada ,  Takayoshi Yamada

IPC分类号： G11C7/10 ,  G11C7/12 ,  G11C11/22

CPC分类号： G11C11/22 ,  G11C7/1048 ,  G11C7/12

摘要： A semiconductor memory device has a plurality of memory cells each having a first ferroelectric capacitor for storing data as a polarization value. First voltage applying means applies a first read voltage between the pair of electrodes of the first ferroelectric capacitor composing that one of the plurality of memory cells from which data is to be read. Data reading means detects the polarization value in the first ferroelectric capacitor when the first read voltage is applied between the pair of electrodes of the first ferroelectric capacitor and thereby reads the data stored in the first ferroelectric capacitor therefrom. A hysteresis loop in the first ferroelectric capacitor is shifted in a direction of voltage opposite in polarity to the first read voltage.

摘要翻译： 半导体存储器件具有多个存储单元，每个存储单元具有用于存储数据作为极化值的第一铁电电容器。 第一电压施加装置在构成要从其读取数据的多个存储单元中的一个的第一强电介质电容器的一对电极之间施加第一读取电压。 当在第一强电介质电容器的一对电极之间施加第一读取电压时，数据读取装置检测第一铁电电容器中的极化值，从而读取存储在第一铁电电容器中的数据。 第一铁电电容器中的磁滞回线在与第一读取电压的极性相反的电压方向上偏移。

公开(公告)号：US06753560B2

公开(公告)日：2004-06-22

申请号：US09891214

申请日：2001-06-26

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L28/55

摘要： A semiconductor memory of this invention is composed of an MFMIS transistor including a first field effect transistor and a ferroelectric capacitor formed on or above the first field effect transistor with a gate electrode of the first field effect transistor working as or being electrically connected to a lower electrode of the ferroelectric capacitor, an upper electrode of the ferroelectric capacitor working as a control gate and the first field effect transistor having a first well region; and a second field effect transistor having a second well region that is isolated from the first well region of the first field effect transistor. The first well region of the first field effect transistor is electrically connected to the source region of the second field effect transistor, and the gate electrode of the first field effect transistor is electrically connected to the drain region of the second field effect transistor.

摘要翻译： 本发明的半导体存储器由包括形成在第一场效应晶体管上或第一场效应晶体管上的第一场效应晶体管和铁电电容器的MFMIS晶体管组成，其中第一场效应晶体管的栅电极用作或与下电 铁电电容器的电极，作为控制栅极的铁电电容器的上电极和具有第一阱区的第一场效应晶体管; 以及具有与第一场效应晶体管的第一阱区隔离的第二阱区的第二场效应晶体管。 第一场效应晶体管的第一阱区电连接到第二场效应晶体管的源极区域，第一场效应晶体管的栅极电连接到第二场效应晶体管的漏极区域。

公开(公告)号：US06579628B2

公开(公告)日：2003-06-17

申请号：US09877085

申请日：2001-06-11

申请人： Yuko Takeuchi ,  Yoshihisa Kato ,  Noriyoshi Yokota ,  Seiya Asari ,  Masaki Tsuchiya ,  Takao Shimizu ,  Isao Tanaka

发明人： Yuko Takeuchi ,  Yoshihisa Kato ,  Noriyoshi Yokota ,  Seiya Asari ,  Masaki Tsuchiya ,  Takao Shimizu ,  Isao Tanaka

IPC分类号： F16L902

CPC分类号： F28F19/06 ,  B23K35/304 ,  B23K35/32 ,  C10G9/16 ,  C10G9/203 ,  F28D2021/0059 ,  Y10T428/12493 ,  Y10T428/12854 ,  Y10T428/12937

摘要： The multi-layered heat resistant metal tube is disclosed. This tube has excellent anti-coking characteristics and is suitable for use under the conditions where carbon tends to deposit and accumulate thereon due to contacting with hydrocarbons at a high temperature. The tube is made by forming weld-mounted overlaid layer of Cr—Ni alloy by building-up welding over the inner surface and/or the outer surface of a substrate tube made of a heat resistant metal. The Cr—Ni alloy comprises 35% by weight or more of Cr and satisfies the relationship: Ni(w%)≧0.5Cr(wt %). Building-up welding is preferably carried out by PPW (Plasma Powder Welding) in which the filler metal is supplied in the form of powder.

公开(公告)号：US06449185B2

公开(公告)日：2002-09-10

申请号：US09886995

申请日：2001-06-25

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： G11C1122

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11585 ,  H01L27/1159

摘要： A semiconductor memory includes a storing transistor for storing data, wherein the storing transistor includes an MFS transistor, an MFIS transistor, or an MFMIS transistor, and a selecting transistor for selecting the storing transistor. The storing transistor is a first field effect transistor having a first well region. The selecting transistor is second field effect transistor having a second well region that is isolated from the first well region of the first field effect transistor. The semiconductor memory further includes a first voltage supply line for supplying a DC voltage to the first well region of the first field effect transistor, and a second voltage supply line, independent of the first voltage supply line, for supplying a DC voltage to the second well region of the second field effect transistor.

摘要翻译： 半导体存储器包括用于存储数据的存储晶体管，其中存储晶体管包括MFS晶体管，MFIS晶体管或MFMIS晶体管，以及用于选择存储晶体管的选择晶体管。 存储晶体管是具有第一阱区的第一场效应晶体管。 选择晶体管是具有与第一场效应晶体管的第一阱区隔离的第二阱区的第二场效应晶体管。 半导体存储器还包括用于向第一场效应晶体管的第一阱区域提供DC电压的第一电压供应线和独立于第一电压供应线的第二电压供应线，用于向第二场效应晶体管提供DC电压 第二场效应晶体管的阱区。

公开(公告)号：US06421268B2

公开(公告)日：2002-07-16

申请号：US09899839

申请日：2001-07-09

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： G11C1122

CPC分类号： G11C11/22

摘要： A multi-valued data is written in a ferroelectric capacitor, which stores a multi-valued data in accordance with displacement of polarization of a ferroelectric film thereof, by applying a relatively high first writing voltage or a relatively low second writing voltage between a first electrode and a second electrode of the ferroelectric capacitor. Next, a potential difference induced between the first and second electrodes is removed. Then, the multi-valued data is read by detecting the displacement of the polarization of the ferroelectric film by applying a reading voltage between the second electrode and a substrate where a reading FET for detecting the displacement of the polarization of the ferroelectric film is formed. The reading voltage has the same polarity as the first writing voltage and is set to such magnitude that, in applying the reading voltage, a first potential difference induced between the gate electrode of the reading FET and the substrate when the multi-valued data is written by applying the first writing voltage is smaller than a second potential difference induced between the gate electrode and the substrate when the multi-valued data is written by applying the second writing voltage.

摘要翻译： 多值数据被写入铁电电容器中，该铁电电容器通过在第一电极之间施加相对较高的第一写入电压或相对较低的第二写入电压来存储根据其铁电体膜的极化位移的多值数据 和铁电电容器的第二电极。 接下来，去除在第一和第二电极之间引起的电位差。 然后，通过在第二电极和衬底之间施加读取电压来检测强电介质膜的偏振的位移来读取多值数据，其中形成用于检测强电介质膜的偏振位移的读取FET。 读取电压具有与第一写入电压相同的极性，并且被设置为使得在施加读取电压时，当写入多值数据时，在读取FET的栅电极和衬底之间感应的第一电位差 通过施加第一写入电压小于通过施加第二写入电压来写入多值数据时在栅电极和衬底之间感应的第二电位差。

公开(公告)号：US6055883A

公开(公告)日：2000-05-02

申请号：US845480

申请日：1997-04-25

申请人： Yoshihisa Kato

发明人： Yoshihisa Kato

IPC分类号： B60R21/09 ,  B60T7/06 ,  B62D25/08 ,  G05G1/32 ,  G05G1/14

CPC分类号： G05G1/32 ,  B60R21/09 ,  B60T7/065 ,  Y10T74/20528 ,  Y10T74/20888

摘要： A supporting structure of a pedal device for a vehicle, comprising: a pedal bracket fixed to a vehicle body so as to support a rotating shaft portion of a suspended type pedal device for a vehicle; and a displacement controlling device coupled to a rear end portion of the pedal bracket so as to control the displacement of a stepping surface of the pedal device for a vehicle as a result of displacement of the displacement controlling device substantially in a downward direction of the vehicle by an external force of a predetermined value or greater which is applied to a front portion of the vehicle.

摘要翻译： 一种用于车辆的踏板装置的支撑结构，包括：固定到车体的踏板支架，以支撑用于车辆的悬挂式踏板装置的旋转轴部; 以及位移控制装置，其联接到所述踏板支架的后端部分，以便控制由于所述位移控制装置基本上在所述车辆的向下方向上的位移而导致的用于车辆的所述踏板装置的踏板面的位移 通过施加到车辆的前部的预定值以上的外力。

公开(公告)号：US5615406A

公开(公告)日：1997-03-25

申请号：US313795

申请日：1994-09-28

申请人： Kyoichi Sasaki ,  Yoshihisa Kato

发明人： Kyoichi Sasaki ,  Yoshihisa Kato

IPC分类号： C22C1/05 ,  B23K35/02 ,  B23K35/30 ,  B23K35/32 ,  C22C29/06 ,  C22C32/00 ,  C23C24/10 ,  C23C26/02 ,  B22F3/105 ,  B22F3/15

CPC分类号： B23K35/0255 ,  B23K35/327 ,  C23C24/103 ,  C23C26/02 ,  B23K35/304 ,  B23K35/3046 ,  B23K35/3093 ,  Y10T428/12931 ,  Y10T428/12937 ,  Y10T428/12944 ,  Y10T428/12951 ,  Y10T428/12958

摘要： A process for preparing an alloy having excellent corrosion resistance and abrasion resistance is provided. The alloy is prepared by providing a powder mixture or VC-powder-containing wire having a matrix metal, including a VC powder having a particle diameter of 10 .mu.m or less, and at least one member selected from the group consisting of an Fe-base alloy, a Co-base alloy and a Ni-base alloy. The powder mixture or VC-powder-containing wire is melted with a heat source having a high energy density. The resultant melt is then cooled to homogeneously crystallize and/or precipitate VC, such that the particle diameter of the VC is reduced to 5 .mu.m or less in the matrix metal phase. Also disclosed is a process for preparing a surface-modified metallic member from a metallic member and an alloy prepared from the aforementioned process.

摘要翻译： 提供了具有优异的耐腐蚀性和耐磨性的合金的制备方法。 该合金通过提供具有基质金属的粉末混合物或含VC粉的线，包括粒径为10μm或更小的VC粉末和至少一种选自Fe- 基底合金，钴基合金和Ni基合金。 粉末混合物或含VC粉末的线材用能量密度高的热源熔化。 然后将所得熔体冷却以使VC均匀结晶和/或沉淀，使得在基体金属相中VC的粒径降低至5μm以下。 还公开了一种由金属构件制备表面改性金属构件的方法和由上述方法制备的合金。

公开(公告)号：USD369347S

公开(公告)日：1996-04-30

申请号：US29267

申请日：1994-08-17

申请人： Hisao Kato ,  Yoshihisa Kato ,  Yoshifumi Oshima

设计人： Hisao Kato ,  Yoshihisa Kato ,  Yoshifumi Oshima

公开(公告)号：US4935721A

公开(公告)日：1990-06-19

申请号：US392321

申请日：1989-08-11

申请人： Yoshihisa Kato

发明人： Yoshihisa Kato

IPC分类号： A63D3/00 ,  A63D5/04 ,  A63F13/00

CPC分类号： A63D5/04

摘要： An apparatus for indicating a strike at bowling alleys has a display board provided with a plurality of displays adapted to show a plurality of symbols thereon, a detector adapted to detect the occurrence of a strike, a microcomputer adapted to determine a several-digit number at random in accordance with an output from the detector, and a lighting circuit adapted to show numerals on the display board in accordance with numeric signals from the microcomputer. The microcomputer outputs random numeric signals successively to the lighting circuit with the microcomputer has received an output from the detector, to show numerals on the display board so that the numerals look as if they were rotated, and the outputting of the numeric signals to the lighting circuit is continued so as to show after the lapse of a predetermined period of time the determined numerals on the displays on the display board in order at predetermined time intervals.

摘要翻译： 一种用于指示在保龄球道上的打击的装置，具有设置有适于显示多个符号的多个显示器的显示板，适用于检测撞击发生的检测器，微型计算机，适于确定数位数 随机地根据来自检测器的输出，以及照明电路，其适于根据来自微型计算机的数字信号在显示板上显示数字。 微型计算机将随机数字信号连续地输出到照明电路，微计算机已经接收到来自检测器的输出，在显示板上显示数字，使得数字看起来好像被旋转，并且将数字信号输出到照明 继续进行电路，以便以预定的时间间隔依次显示经过预定时间段在显示板上的显示器上的确定的数字。