公开(公告)号：US20050201139A1

公开(公告)日：2005-09-15

申请号：US11121011

申请日：2005-05-04

申请人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Keisuke Tanaka ,  Daisuke Ueda

发明人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Keisuke Tanaka ,  Daisuke Ueda

IPC分类号： H01L27/105 ,  G11C11/22 ,  H01L21/02 ,  H01L21/316 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/108 ,  H01L27/115

CPC分类号： H01L27/11507 ,  H01L21/31691 ,  H01L27/11502 ,  H01L28/55

摘要： A memory device includes memory cells each having a capacitor including a lower electrode, a ferroelectric film and an upper electrode which are formed in this order over a substrate made of silicon. The ferroelectric film is selectively grown on the lower electrode. Such selective formation of the ferroelectric film on the lower electrode having a desired shape prevents a damaged portion from occurring in the ferroelectric film, thus making it possible to downsize the memory cells.

摘要翻译： 存储器件包括存储单元，每个存储单元具有在由硅制成的衬底上依次形成的下电极，铁电体膜和上电极的电容器。 在下电极上选择性地生长强电介质膜。 在具有所需形状的下电极上选择性地形成铁电体膜，可防止在铁电体膜中发生损坏部分，从而可以使存储单元小型化。

公开(公告)号：US06787830B2

公开(公告)日：2004-09-07

申请号：US09804311

申请日：2001-03-13

申请人： Yasuhiro Shimada ,  Yoshihisa Kato

发明人： Yasuhiro Shimada ,  Yoshihisa Kato

IPC分类号： H01L2972

CPC分类号： G11C11/22 ,  H01L27/105 ,  H01L27/11585 ,  H01L27/1159 ,  H01L27/11592 ,  H01L29/6684 ,  H01L29/78391

摘要： A gate electrode and a gate insulating film are formed for each of PMOSFET, NMOSFET and ferroelectric FET. Source/drain regions are defined for the NMOSFET and ferroelectric FET and for the PMOSFET by performing ion implantation processes twice separately. An intermediate electrode connected to the gate electrode of the ferroelectric FET, a ferroelectric film and a control gate electrode are formed over a first interlevel dielectric film. An interconnect layer, which includes first and second interconnects and is connected to the gate electrodes of the CMOS device, is formed on a second interlevel dielectric film. The first and second interconnects are connected to the control gate and intermediate electrodes of the ferroelectric FET, respectively.

摘要翻译： 为PMOSFET，NMOSFET和铁电FET中的每一个形成栅极电极和栅极绝缘膜。 通过两次分别进行离子注入工艺，为NMOSFET和铁电FET以及PMOSFET定义源/漏区。 在第一层间绝缘膜上形成连接到铁电FET的栅极的中间电极，铁电体膜和控制栅电极。 包括第一和第二互连并连接到CMOS器件的栅电极的互连层形成在第二层间绝缘膜上。 第一和第二互连分别连接到铁电FET的控制栅极和中间电极。

公开(公告)号：US06771530B2

公开(公告)日：2004-08-03

申请号：US09886972

申请日：2001-06-25

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： G11C1122

CPC分类号： G11C11/22 ,  H01L27/11502 ,  H01L29/78391

摘要： A method for driving a semiconductor memory including a field effect transistor having a gate electrode formed on a ferroelectric film includes the steps of writing a data in the semiconductor memory by changing a polarized state of the ferroelectric film by applying a voltage to the gate electrode, and reading a data written in the semiconductor memory by detecting a current change appearing between a drain and a source of the field effect transistor by applying a voltage between the drain and the source of the field effect transistor with a voltage applied to the gate electrode. The magnitude of the voltage applied between the drain and the source of the field effect transistor in the step of reading a data is set within a range where a drain-source current of the field effect transistor increases as a drain-source voltage thereof increases.

摘要翻译： 一种用于驱动半导体存储器的方法，该半导体存储器包括具有形成在铁电体膜上的栅电极的场效应晶体管，包括以下步骤：通过向栅电极施加电压来改变强电介质膜的极化状态，从而在半导体存储器中写入数据， 以及通过在所述场效应晶体管的漏极和源极之间施加施加到所述栅电极的电压的电压来检测出现在所述场效应晶体管的漏极和源极之间的电流变化来读取写入所述半导体存储器中的数据。 在读取数据的步骤中施加在场效应晶体管的漏极和源极之间的电压的幅度被设定在场效应晶体管的漏 - 源电流随着其漏 - 源电压增加而增加的范围内。

公开(公告)号：US06618284B2

公开(公告)日：2003-09-09

申请号：US10011489

申请日：2001-12-11

申请人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

发明人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

IPC分类号： G11C1122

CPC分类号： G11C11/22

摘要： A semiconductor memory includes a ferroelectric capacitor having a ferroelectric film, a first electrode formed on the ferroelectric film and a second electrode formed under the ferroelectric film. A data writing unit causes a first state in which the ferroelectric film has polarization in a direction from the first electrode to the second electrode or in a direction from the second electrode to the first electrode and has a substantially saturated polarization value or a second state in which the ferroelectric film has polarization in the same direction as in the first state and has a substantially zero polarization value, thereby writing a data corresponding to the first state or the second state in the ferroelectric capacitor. A data reading unit detects whether the ferroelectric capacitor is in the first state or in the second state, thereby reading a data stored in the ferroelectric capacitor.

公开(公告)号：US06455883B2

公开(公告)日：2002-09-24

申请号：US09879081

申请日：2001-06-13

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： H01L2972

CPC分类号： H01L29/78391

摘要： A source region and a drain region are formed in a silicon substrate, a dielectric film is formed above a region of the silicon substrate between the source region and the drain region, a ferroelectric film is formed on the dielectric film, and a gate electrode is formed on the ferroelectric film. The ferroelectric film and the silicon substrate have a first conductivity type, and the source region and the drain region has a second conductivity type.

摘要翻译： 在硅衬底中形成源区和漏区，在源极区和漏区之间的硅衬底的区域的上方形成电介质膜，在电介质膜上形成铁电膜，栅电极为 形成在铁电薄膜上。 铁电体膜和硅衬底具有第一导电类型，并且源极区和漏极区具有第二导电类型。

公开(公告)号：US06950327B2

公开(公告)日：2005-09-27

申请号：US10686583

申请日：2003-10-17

申请人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

发明人： Yasuhiro Shimada ,  Yoshihisa Kato ,  Takayoshi Yamada

IPC分类号： G11C11/22

CPC分类号： G11C11/22

摘要： In a ferroelectric capacitor, two displacements (points b and c) of a remanent polarization correspond to data “1” and one displacement (point a) of the remanent polarization corresponds to data “0”. When the data “1” is written, either of two electric voltage pulses different in potential or in pulse width is applied to the ferroelectric capacitor to position the displacement of the remanent polarization in the ferroelectric capacitor at the point b or at the point c. When the data “0” is written, on the other hand, the displacement of the remanent polarization in the ferroelectric capacitor is positioned at the point a.

摘要翻译： 在铁电电容器中，剩余极化的两个位移（点b和c）对应于数据“1”，剩余极化的一个位移（点a）对应于数据“0”。 当写入数据“1”时，电压或脉冲宽度不同的两个电压脉冲中的任一个施加到铁电电容器，以将铁电电容器中剩余极化的位移定位在点b处或点c处。 另一方面，当写入数据“0”时，铁电电容器中剩余极化的位移位于点a处。

公开(公告)号：US06853576B2

公开(公告)日：2005-02-08

申请号：US10653201

申请日：2003-09-03

申请人： Yoshihisa Kato ,  Yasuhiro Shimada ,  Takayoshi Yamada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada ,  Takayoshi Yamada

IPC分类号： G11C7/10 ,  G11C7/12 ,  G11C11/22

CPC分类号： G11C11/22 ,  G11C7/1048 ,  G11C7/12

摘要： A semiconductor memory device has a plurality of memory cells each having a first ferroelectric capacitor for storing data as a polarization value. First voltage applying means applies a first read voltage between the pair of electrodes of the first ferroelectric capacitor composing that one of the plurality of memory cells from which data is to be read. Data reading means detects the polarization value in the first ferroelectric capacitor when the first read voltage is applied between the pair of electrodes of the first ferroelectric capacitor and thereby reads the data stored in the first ferroelectric capacitor therefrom. A hysteresis loop in the first ferroelectric capacitor is shifted in a direction of voltage opposite in polarity to the first read voltage.

摘要翻译： 半导体存储器件具有多个存储单元，每个存储单元具有用于存储数据作为极化值的第一铁电电容器。 第一电压施加装置在构成要从其读取数据的多个存储单元中的一个的第一强电介质电容器的一对电极之间施加第一读取电压。 当在第一强电介质电容器的一对电极之间施加第一读取电压时，数据读取装置检测第一铁电电容器中的极化值，从而读取存储在第一铁电电容器中的数据。 第一铁电电容器中的磁滞回线在与第一读取电压的极性相反的电压方向上偏移。

公开(公告)号：US06753560B2

公开(公告)日：2004-06-22

申请号：US09891214

申请日：2001-06-26

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： H01L2976

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L28/55

摘要： A semiconductor memory of this invention is composed of an MFMIS transistor including a first field effect transistor and a ferroelectric capacitor formed on or above the first field effect transistor with a gate electrode of the first field effect transistor working as or being electrically connected to a lower electrode of the ferroelectric capacitor, an upper electrode of the ferroelectric capacitor working as a control gate and the first field effect transistor having a first well region; and a second field effect transistor having a second well region that is isolated from the first well region of the first field effect transistor. The first well region of the first field effect transistor is electrically connected to the source region of the second field effect transistor, and the gate electrode of the first field effect transistor is electrically connected to the drain region of the second field effect transistor.

摘要翻译： 本发明的半导体存储器由包括形成在第一场效应晶体管上或第一场效应晶体管上的第一场效应晶体管和铁电电容器的MFMIS晶体管组成，其中第一场效应晶体管的栅电极用作或与下电 铁电电容器的电极，作为控制栅极的铁电电容器的上电极和具有第一阱区的第一场效应晶体管; 以及具有与第一场效应晶体管的第一阱区隔离的第二阱区的第二场效应晶体管。 第一场效应晶体管的第一阱区电连接到第二场效应晶体管的源极区域，第一场效应晶体管的栅极电连接到第二场效应晶体管的漏极区域。

公开(公告)号：US06449185B2

公开(公告)日：2002-09-10

申请号：US09886995

申请日：2001-06-25

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： G11C1122

CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L27/11585 ,  H01L27/1159

摘要： A semiconductor memory includes a storing transistor for storing data, wherein the storing transistor includes an MFS transistor, an MFIS transistor, or an MFMIS transistor, and a selecting transistor for selecting the storing transistor. The storing transistor is a first field effect transistor having a first well region. The selecting transistor is second field effect transistor having a second well region that is isolated from the first well region of the first field effect transistor. The semiconductor memory further includes a first voltage supply line for supplying a DC voltage to the first well region of the first field effect transistor, and a second voltage supply line, independent of the first voltage supply line, for supplying a DC voltage to the second well region of the second field effect transistor.

摘要翻译： 半导体存储器包括用于存储数据的存储晶体管，其中存储晶体管包括MFS晶体管，MFIS晶体管或MFMIS晶体管，以及用于选择存储晶体管的选择晶体管。 存储晶体管是具有第一阱区的第一场效应晶体管。 选择晶体管是具有与第一场效应晶体管的第一阱区隔离的第二阱区的第二场效应晶体管。 半导体存储器还包括用于向第一场效应晶体管的第一阱区域提供DC电压的第一电压供应线和独立于第一电压供应线的第二电压供应线，用于向第二场效应晶体管提供DC电压 第二场效应晶体管的阱区。

公开(公告)号：US06421268B2

公开(公告)日：2002-07-16

申请号：US09899839

申请日：2001-07-09

申请人： Yoshihisa Kato ,  Yasuhiro Shimada

发明人： Yoshihisa Kato ,  Yasuhiro Shimada

IPC分类号： G11C1122

CPC分类号： G11C11/22

摘要： A multi-valued data is written in a ferroelectric capacitor, which stores a multi-valued data in accordance with displacement of polarization of a ferroelectric film thereof, by applying a relatively high first writing voltage or a relatively low second writing voltage between a first electrode and a second electrode of the ferroelectric capacitor. Next, a potential difference induced between the first and second electrodes is removed. Then, the multi-valued data is read by detecting the displacement of the polarization of the ferroelectric film by applying a reading voltage between the second electrode and a substrate where a reading FET for detecting the displacement of the polarization of the ferroelectric film is formed. The reading voltage has the same polarity as the first writing voltage and is set to such magnitude that, in applying the reading voltage, a first potential difference induced between the gate electrode of the reading FET and the substrate when the multi-valued data is written by applying the first writing voltage is smaller than a second potential difference induced between the gate electrode and the substrate when the multi-valued data is written by applying the second writing voltage.

摘要翻译： 多值数据被写入铁电电容器中，该铁电电容器通过在第一电极之间施加相对较高的第一写入电压或相对较低的第二写入电压来存储根据其铁电体膜的极化位移的多值数据 和铁电电容器的第二电极。 接下来，去除在第一和第二电极之间引起的电位差。 然后，通过在第二电极和衬底之间施加读取电压来检测强电介质膜的偏振的位移来读取多值数据，其中形成用于检测强电介质膜的偏振位移的读取FET。 读取电压具有与第一写入电压相同的极性，并且被设置为使得在施加读取电压时，当写入多值数据时，在读取FET的栅电极和衬底之间感应的第一电位差 通过施加第一写入电压小于通过施加第二写入电压来写入多值数据时在栅电极和衬底之间感应的第二电位差。