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    LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY
    87.
    发明申请
    LAYOUT PATTERN FOR MAGNETORESISTIVE RANDOM ACCESS MEMORY 有权

    公开(公告)号：US20210225933A1

    公开(公告)日：2021-07-22

    申请号：US16792271

    申请日：2020-02-16

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ya-Huei Tsai ,  Rai-Min Huang ,  Yu-Ping Wang ,  Hung-Yueh Chen

    IPC: H01L27/22 ,  H01L23/528 ,  H01L43/02

    Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region and a gate pattern extending from the first active region to the second active region, in which the gate pattern includes a H-shape according to a top view. Preferably, the gate pattern includes a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, and a third gate pattern connecting the first gate pattern and the second gate pattern along a second direction.

    MRAM STRUCTURE
    88.
    发明申请
    MRAM STRUCTURE 有权

    公开(公告)号：US20210225414A1

    公开(公告)日：2021-07-22

    申请号：US17224153

    申请日：2021-04-07

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Po-Kai Hsu ,  Hung-Yueh Chen ,  Kun-I Chou ,  Jing-Yin Jhang ,  Hui-Lin Wang ,  Yu-Ping Wang

    IPC: G11C5/06 ,  H01L27/24 ,  H01L27/22

    Abstract: A MRAM structure, which is provided with multiple source lines between active areas, each source line has multiple branches electrically connecting with the active areas at opposite sides in alternating arrangement. Multiple word lines traverse through the active areas to form transistors. Multiple storage units are disposed between the word lines on the active areas in staggered array arrangement, and multiple bit lines electrically connect with storage units on corresponding active areas, wherein each storage cell includes one of the storage unit, two of the transistors respectively at both sides of the storage unit, and two branches of the source line.

    MAGNETORESISTIVE RANDOM ACCESS MEMORY
    89.
    发明申请
    MAGNETORESISTIVE RANDOM ACCESS MEMORY 有权

    公开(公告)号：US20210184104A1

    公开(公告)日：2021-06-17

    申请号：US17182146

    申请日：2021-02-22

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chung-Liang Chu ,  Jian-Cheng Chen ,  Yu-Ping Wang ,  Yu-Ruei Chen

    IPC: H01L43/02 ,  G11C11/16 ,  H01L27/02 ,  H01L27/22

    Abstract: A semiconductor device includes a substrate having an array region defined thereon, a ring of magnetic tunneling junction (MTJ) region surrounding the array region, a gap between the array region and the ring of MTJ region, and metal interconnect patterns overlapping part of the ring of MTJ region. Preferably, the array region includes a magnetic random access memory (MRAM) region and a logic region and the ring of MTJ region further includes a first MTJ region and a second MTJ region extending along a first direction and a third MTJ region and a fourth MTJ region extending along a second direction.

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