MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS
    81.
    发明申请
    MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS 有权
    具有独立阅读和写入功能的磁记录

    公开(公告)号:US20100032778A1

    公开(公告)日:2010-02-11

    申请号:US12326186

    申请日:2008-12-02

    IPC分类号: H01L43/02 G11C11/16

    摘要: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

    摘要翻译: 公开了具有分离的读和写路径的磁存储器。 磁存储器单元包括具有第一磁化取向的第一端部,具有第二磁化取向的相对的第二端部和第一端部与第二端部之间的中间部分的铁磁条,所述中间部分具有 自由磁化方向。 第一磁化取向与第二磁化取向相反。 隧道势垒将磁性参考层与形成磁性隧道结的中间部分分开。 位线电耦合到第二端部。 源极线电耦合到第一端部,并且读取线电耦合到磁性隧道结。

    Magnetic memory with separate read and write paths
    82.
    发明授权
    Magnetic memory with separate read and write paths 失效
    具有独立读写路径的磁记忆体

    公开(公告)号:US08520432B2

    公开(公告)日:2013-08-27

    申请号:US12974699

    申请日:2010-12-21

    IPC分类号: G11C11/14

    摘要: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

    摘要翻译: 公开了具有分离的读和写路径的磁存储器。 磁存储器单元包括具有第一磁化取向的第一端部,具有第二磁化取向的相对的第二端部和第一端部与第二端部之间的中间部分的铁磁条,所述中间部分具有 自由磁化方向。 第一磁化取向与第二磁化取向相反。 隧道势垒将磁性参考层与形成磁性隧道结的中间部分分开。 位线电耦合到第二端部。 源极线电耦合到第一端部,并且读取线电耦合到磁性隧道结。

    Single line MRAM
    83.
    发明授权
    Single line MRAM 失效
    单线MRAM

    公开(公告)号:US08519495B2

    公开(公告)日:2013-08-27

    申请号:US12372025

    申请日:2009-02-17

    IPC分类号: H01L29/82

    摘要: A magnetic memory device includes a first electrode separated from a second electrode by a magnetic tunnel junction. The first electrode provides a write current path along a length of the first electrode. The magnetic tunnel junction includes a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation. The free magnetic layer is spaced from the first electrode a distance of less than 10 nanometers. A current passing along the write current path generates a magnetic field. The magnetic field switches the free magnetic layer magnetization orientation between a high resistance state magnetization orientation and a low resistance state magnetization orientation.

    摘要翻译: 磁存储器件包括通过磁性隧道结从第二电极分离的第一电极。 第一电极沿着第一电极的长度提供写入电流路径。 磁性隧道结包括具有可在高电阻状态磁化取向和低电阻状态磁化取向之间切换的磁化取向的自由磁性层。 自由磁性层与第一电极间隔小于10纳米的距离。 沿着写入电流路径的电流产生磁场。 磁场在高电阻状态磁化取向和低电阻状态磁化取向之间切换自由磁层磁化取向。

    Three dimensionally stacked non volatile memory units
    84.
    发明授权
    Three dimensionally stacked non volatile memory units 有权
    三维堆叠的非易失性存储单元

    公开(公告)号:US08054673B2

    公开(公告)日:2011-11-08

    申请号:US12425084

    申请日:2009-04-16

    摘要: A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region.

    摘要翻译: 存储单元,包括跨越存储器单元的第一层中的第一晶体管区域的第一晶体管; 跨越存储器单元的第二层中的第二晶体管区域的第二晶体管; 跨越存储器单元的第三层中的第一存储器区域的第一电阻读出存储器(RSM)单元; 以及跨越存储器单元的第三层中的第二存储器区域的第二RSM单元,其中第一晶体管电耦合到第一RSM单元,并且第二晶体管电耦合到第二RSM单元,其中第二层是 在第一和第三层之间,其中第一和第二晶体管具有晶体管重叠区域,并且其中第一存储区域和第二存储器区域不延伸超过第一晶体管区域和第二晶体管区域。

    Three dimensionally stacked non volatile memory units
    85.
    发明授权
    Three dimensionally stacked non volatile memory units 失效
    三维堆叠的非易失性存储单元

    公开(公告)号:US08482957B2

    公开(公告)日:2013-07-09

    申请号:US13280395

    申请日:2011-10-25

    摘要: A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region.

    摘要翻译: 存储单元,包括跨越存储器单元的第一层中的第一晶体管区域的第一晶体管; 跨越存储器单元的第二层中的第二晶体管区域的第二晶体管; 跨越存储器单元的第三层中的第一存储器区域的第一电阻读出存储器(RSM)单元; 以及跨越存储器单元的第三层中的第二存储器区域的第二RSM单元,其中第一晶体管电耦合到第一RSM单元,并且第二晶体管电耦合到第二RSM单元,其中第二层是 在第一和第三层之间,其中第一和第二晶体管具有晶体管重叠区域,并且其中第一存储区域和第二存储器区域不延伸超过第一晶体管区域和第二晶体管区域。

    nvSRAM having variable magnetic resistors
    86.
    发明授权
    nvSRAM having variable magnetic resistors 失效
    nvSRAM具有可变磁阻

    公开(公告)号:US08194438B2

    公开(公告)日:2012-06-05

    申请号:US12370164

    申请日:2009-02-12

    IPC分类号: G11C11/00

    CPC分类号: G11C14/0081 G11C11/412

    摘要: Non-volatile static random access memory (nvSRAM) that has a six transistor static random access memory (6T SRAM) cell electrically connected to a non-volatile random access memory (nvRAM) cell. The nvRAM cell has first and second variable magnetic resistors and first, second and third transistors.

    摘要翻译: 具有电连接到非易失性随机存取存储器(nvRAM)单元的六晶体管静态随机存取存储器(6T SRAM)单元的非易失性静态随机存取存储器(nvSRAM)。 nvRAM单元具有第一和第二可变磁阻和第一,第二和第三晶体管。

    MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS
    87.
    发明申请
    MAGNETIC MEMORY WITH SEPARATE READ AND WRITE PATHS 失效
    具有独立阅读和写入功能的磁记录

    公开(公告)号:US20110089509A1

    公开(公告)日:2011-04-21

    申请号:US12974699

    申请日:2010-12-21

    IPC分类号: H01L29/82

    摘要: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

    摘要翻译: 公开了具有分离的读和写路径的磁存储器。 磁存储器单元包括具有第一磁化取向的第一端部,具有第二磁化取向的相对的第二端部和第一端部与第二端部之间的中间部分的铁磁条,所述中间部分具有 自由磁化方向。 第一磁化取向与第二磁化取向相反。 隧道势垒将磁性参考层与形成磁性隧道结的中间部分分开。 位线电耦合到第二端部。 源极线电耦合到第一端部,并且读取线电耦合到磁性隧道结。

    Magnetic memory with separate read and write paths
    88.
    发明授权
    Magnetic memory with separate read and write paths 有权
    具有独立读写路径的磁记忆体

    公开(公告)号:US07881104B2

    公开(公告)日:2011-02-01

    申请号:US12326186

    申请日:2008-12-02

    IPC分类号: G11C11/14

    摘要: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

    摘要翻译: 公开了具有分离的读和写路径的磁存储器。 磁存储器单元包括具有第一磁化取向的第一端部,具有第二磁化取向的相对的第二端部和第一端部与第二端部之间的中间部分的铁磁条,所述中间部分具有 自由磁化方向。 第一磁化取向与第二磁化取向相反。 隧道势垒将磁性参考层与形成磁性隧道结的中间部分分开。 位线电耦合到第二端部。 源极线电耦合到第一端部,并且读取线电耦合到磁性隧道结。

    THREE DIMENSIONALLY STACKED NON VOLATILE MEMORY UNITS
    89.
    发明申请
    THREE DIMENSIONALLY STACKED NON VOLATILE MEMORY UNITS 失效
    三维尺寸非易失性存储单元

    公开(公告)号:US20120039113A1

    公开(公告)日:2012-02-16

    申请号:US13280395

    申请日:2011-10-25

    IPC分类号: G11C11/00 H01L45/00

    摘要: A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region.

    摘要翻译: 存储单元,包括跨越存储器单元的第一层中的第一晶体管区域的第一晶体管; 跨越存储器单元的第二层中的第二晶体管区域的第二晶体管; 跨越存储器单元的第三层中的第一存储器区域的第一电阻读出存储器(RSM)单元; 以及跨越存储器单元的第三层中的第二存储器区域的第二RSM单元,其中第一晶体管电耦合到第一RSM单元,并且第二晶体管电耦合到第二RSM单元,其中第二层是 在第一和第三层之间,其中第一和第二晶体管具有晶体管重叠区域,并且其中第一存储区域和第二存储器区域不延伸超过第一晶体管区域和第二晶体管区域。

    THREE DIMENSIONALLY STACKED NON VOLATILE MEMORY UNITS
    90.
    发明申请
    THREE DIMENSIONALLY STACKED NON VOLATILE MEMORY UNITS 有权
    三维尺寸非易失性存储单元

    公开(公告)号:US20100265749A1

    公开(公告)日:2010-10-21

    申请号:US12425084

    申请日:2009-04-16

    IPC分类号: G11C5/02 H01L45/00 G11C11/56

    摘要: A memory unit including a first transistor spanning a first transistor region in a first layer of the memory unit; a second transistor spanning a second transistor region in a second layer of the memory unit; a first resistive sense memory (RSM) cell spanning a first memory region in a third layer of the memory unit; and a second RSM cell spanning a second memory region in the third layer of the memory unit, wherein the first transistor is electrically coupled to the first RSM cell, and the second transistor is electrically coupled to the second RSM cell, wherein the second layer is between the first and third layers, wherein the first and second transistor have an transistor overlap region, and wherein the first memory region and the second memory region do not extend beyond the first transistor region and the second transistor region.

    摘要翻译: 存储单元,包括跨越存储器单元的第一层中的第一晶体管区域的第一晶体管; 跨越存储器单元的第二层中的第二晶体管区域的第二晶体管; 跨越存储器单元的第三层中的第一存储器区域的第一电阻读出存储器(RSM)单元; 以及跨越存储器单元的第三层中的第二存储器区域的第二RSM单元,其中第一晶体管电耦合到第一RSM单元,并且第二晶体管电耦合到第二RSM单元,其中第二层是 在第一和第三层之间,其中第一和第二晶体管具有晶体管重叠区域,并且其中第一存储区域和第二存储器区域不延伸超过第一晶体管区域和第二晶体管区域。