Abstract:
Logic (also called “synchronizing logic”) in a co-processor (that provides an interface to memory) receives a signal (called a “declaration”) from each of a number of tasks, based on an initial determination of one or more paths (also called “code paths”) in an instruction stream (e.g. originating from a high-level software program or from low-level microcode) that a task is likely to follow. Once a task (also called “disabled” task) declares its lack of a future need to access a shared data, the synchronizing logic allows that shared data to be accessed by other tasks (also called “needy” tasks) that have indicated their need to access the same. Moreover, the synchronizing logic also allows the shared data to be accessed by the other needy tasks on completion of access of the shared data by a current task (assuming the current task was also a needy task).
Abstract:
A cut-through system and method are provided for scheduling information in an information distribution device. The method receives a plurality of information streams. A master schedule is created to select messages from the information streams for transfer to a corresponding plurality of remote links. The messages (e.g., packets) may have either a fixed or variable length. The master schedule is responsible for managing a communication link overall maximum bandwidth, and a message bandwidth for each remote link. Concurrently, an underrun schedule is created to select segment rates for a first group of messages destined to corresponding first group of remote links, and manage the message segment rate for the first group of messages. For example, the first group of messages may be destined to remote links that are sensitive to underrun.
Abstract:
A system and method are provided for maximum likelihood estimation in a channel receiving data with inter-symbol interference (ISI). The method receives a serial stream of digital information bits. Decisions are made concerning the received information bit values, which the method accepts as processed information, with soft decisions (SDs) and corresponding initial hard decisions (HDs). The method then identifies a sequence of processed information in a correction matrix, and uses the correction matrix to cross-reference the sequence to a HD look-up value. In response to accessing the HD look-up value, a modified HD is created. The modified HD is decoded, for example, by using forward error correction (FEC), creating a decoded HD. The method compares the decoded HD to the initial HD, and updates the correction matrix HD look-up value in response to the comparison.
Abstract:
A digital cross-connect switching system that has a single-stage architecture, a scalable bandwidth, and reduced connection memory storage requirements. The scalable bandwidth digital cross-connect switching system includes a plurality of digital cross-connect building blocks. Each digital cross-connect building block includes at least one cross-connect having a plurality of input ports and a plurality of output ports, at least one connection memory communicatively coupled to the cross-connect, and at least one OR gate. Bandwidth is scaled in the digital cross-connect switching system by interconnecting predetermined numbers of the digital cross-connect building blocks. In general, the size of the digital cross-connect switching system increases as the square of the bandwidth requirement.
Abstract:
A system and method are provided for controlling packet header information in a packet communications switch fabric. The method comprises: programming the cell header overhead (OH) field definitions; accepting a packet including a plurality of cells and corresponding cell headers, each cell header including a plurality of overhead fields; defining the cell header OH fields; and, transmitting the packet. Defining the cell header OH fields includes defining cell header OH field location, position, meaning, structure, and length. In other aspects, the method comprises redefining the cell header overhead fields, once they are accepted. For example, the OH field information can be modified, relocated, or an OH field can be added to the cell header. In yet other aspects, the OH field information can be extracted and/or reformatted.
Abstract:
A system and method are provided for configuring interface bandwidths in a packet communications switch fabric. The method comprises: interfacing data links with a first plurality of traffic managers (TMs); differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs; and, communicating packets information with the TMs at a first plurality of data rates corresponding to the first plurality of subchannels. More specifically, differentiating port card interface ports into a first plurality of subchannels associated with the first plurality of TMs includes: differentiating a second plurality of ingress data links into a third plurality of ingress subchannels associated with a third plurality of ingress traffic managers (iTMs); and, differentiating a fourth plurality of egress data links into a fifth plurality of egress subchannels associated with a fifth plurality of egress TMs (eTMs).
Abstract:
A system and method are provided for coding a frame in a packet communications system using a G.709 Digital Wrapper Frame format. The method comprises: accepting digital information; outer encoding the digital information with a Reed Solomon (RS) encoding scheme; interleaving the outer encoded information; inner encoding the interleaved information using a BCH encoding scheme; and, forming a G.709 Digital Wrapper frame including payload and parity bytes. More specifically, a standard DW superframe is formed with 122,368 bits of payload and 8192 bits of parity. The outer encoding process uses an RS(1023,1007) parent code. In one aspect, 15 groups of RS(781,765) and 1 group of RS(778,762) codewords are formed per superframe. The inner encoding process uses a BCH(2047,1959) parent code. In one aspect, 64 groups of BCH(2040,1952) codewords are formed per superframe.
Abstract:
A credit-based system and method are provided for managing backplane traffic flow in a packet communications switch fabric. The method comprises: accepting information packets including cells and cell headers with destination information; modifying the destination information in the received cell headers; routing information packets between an input port card and output port cards on backplane data links through an intervening crossbar; at the input port card, maintaining a credit counter for each output port card channel; decrementing the counter in response to transmitting cells from the input port card; generating credits in response to transmitting cells from an output port card channel; and, using modified destination information, sending the generated credits to increment the counter. In some aspects, modifying the destination information in the received packet headers includes: extracting the output port card termination from the card field; and, inserting the input port card source in the card field.
Abstract:
A system and method are provided for tracking connections in a network bundle including a plurality of network links. The method comprises: receiving packet fragments in a plurality of sampling rounds; for a current sampling round, recording which links have supplied a packet fragment; and, advancing a record of the received packet fragments in response a packet fragment on each link. Typically, the packet fragments are received with a corresponding first plurality of sequence numbers. Then, the lowest sequence number in the completed current sampling round is recorded. Some aspects of the method additionally comprise: for the current sampling round, establishing a flag register with a flag for each link; establishing a next lowest sequence number (Mn) register; and, establishing a current lowest sequence number (Mc) register. Then, a flag register flag is toggled in response to receiving a packet fragment on a corresponding link.
Abstract:
The solution to the shortest path between a source node and multiple destination nodes is accelerated using a grouping of nodes, where the nodes are grouped based on distance from the source node, and a corresponding set of memory locations that indicate when a group includes one or more nodes. The memory locations can be quickly searched to determine the group that represents the shortest distance from the source node and that includes one or more nodes. Nodes may be grouped into additional groupings that do not correspond to the set of memory locations, when the distance from the source node to the nodes exceeds the range of memory locations. Advantageously, the disclosed system and method provide the ability to reach asymptotically optimal performance.