-
公开(公告)号：US07804052B2
公开(公告)日：2010-09-28
申请号：US11808375
申请日：2007-06-08
CPC分类号： H04N5/357 , H04N17/002
摘要： Methods and apparatuses for non-optical testing of imaging devices having an array of pixels are provided. One or more pixels are tested by setting the photoconversion device and/or a floating diffusion region to a known voltage level that is different from that used to operate the pixel during non-test operation. The pixel is then sampled and compared to an expected value.
摘要翻译： 提供了具有像素阵列的成像装置的非光学测试的方法和装置。 通过将光电转换装置和/或浮动扩散区域设置为与在非测试操作期间操作像素时不同的已知电压电平来测试一个或多个像素。 然后对像素进行采样并与预期值进行比较。
-
2.发明授权Color filter array and imaging device containing such color filter array and method of fabrication 有权滤色器阵列和包含这种滤色器阵列的成像装置及其制造方法公开(公告)号：US07799491B2
公开(公告)日：2010-09-21
申请号：US11399312
申请日：2006-04-07
IPC分类号： G02B5/20 , H01L31/0232
CPC分类号： G02B5/201 , H01L27/14621 , H01L27/14685
摘要： A method and apparatus are disclosed which provide a color filter array for an imaging device in which the filters of the array are accurately positioned through the use of a patterned mask layer used to form filters for one color of the array. Additionally or alternatively, the color filter array can have a light blocking spacer to block light from being transmitted between color filters and/or to a peripheral circuitry region.
摘要翻译： 公开了一种提供用于成像装置的滤色器阵列的方法和装置，其中通过使用用于形成阵列的一种颜色的滤光片的图案化掩模层来精确地定位阵列的滤光器。 附加地或替代地，滤色器阵列可以具有遮光间隔物以阻止光在滤色器之间传输和/或与外围电路区域之间传输。
-
3.发明授权Method and circuit for determining the response curve knee point in active pixel image sensors with extended dynamic range 有权用于确定具有扩展动态范围的有源像素图像传感器中的响应曲线拐点的方法和电路公开(公告)号：US07768563B2
公开(公告)日：2010-08-03
申请号：US11785546
申请日：2007-04-18
CPC分类号： H04N5/35509
摘要： An apparatus and method for measuring the breakpoint of a response curve representing the voltage output of an image array having an extended dynamic range. By flooding a light-opaque pixel with a charge and then applying an intermediate reset voltage to the pixel, the signal is read from the pixel and stored. The full reset voltage is applied to the pixel, and then the signal in the pixel is read and stored. The voltage output difference is the difference between the first and second stored signal. The voltage output difference is then used to determine the voltage of the knee point. Further, a conventional saturated pixel can be reset with an intermediate reset just prior to readout. The resulting signal can then be used to determine the voltage of the knee point.
摘要翻译： 一种用于测量表示具有扩展动态范围的图像阵列的电压输出的响应曲线的断点的装置和方法。 通过用充电填充不透明的像素，然后对像素施加中间复位电压，从像素读取信号并存储。 将全部复位电压施加到像素，然后读取并存储像素中的信号。 电压输出差是第一和第二存储信号之间的差。 然后使用电压输出差异来确定拐点的电压。 此外，传统的饱和像素可以在读出之前用中间复位来复位。 然后可以使用所得到的信号来确定拐点的电压。
-
公开(公告)号：US07773317B2
公开(公告)日：2010-08-10
申请号：US12216244
申请日：2008-07-01
申请人： Jacques Duparre
发明人： Jacques Duparre
IPC分类号： G02B9/04
CPC分类号： G02B13/0085 , G02B9/56 , G02B13/003 , G02B13/006
摘要： A lens system comprising an inner lens structure and an outer lens structure. The inner lens structure comprises an inner positive lens, a first transparent substrate and an inner negative lens. The outer lens structure comprises an outer positive lens, a second transparent substrate and an outer negative lens.
-
公开(公告)号：US07675080B2
公开(公告)日：2010-03-09
申请号：US11328152
申请日：2006-01-10
申请人： Ulrich C. Boettiger
发明人： Ulrich C. Boettiger
IPC分类号： H01L31/0232
CPC分类号： H01L27/14685 , H01L27/14621 , H01L27/14627
摘要： A method and apparatus for improving the planarity of a recessed color filter array when the recessed region or trench depth exceeds the thickness of the color filter film. The method includes the steps of coating the entire wafer with an additional coating material after applying the CFA, then planarizing that resist layer using CMP and then using a dry etch to transfer that planar surface down as far as required to achieve a planar color filter with a uniform thickness.
摘要翻译： 一种用于在凹陷区域或沟槽深度超过滤色膜厚度时改善凹陷滤色器阵列的平面度的方法和装置。 该方法包括以下步骤：在施加CFA之后用附加涂层材料涂覆整个晶片，然后使用CMP对该抗蚀剂层进行平面化，然后使用干蚀刻将该平面表面向下转移以达到所需的平面滤色器，以实现具有 均匀的厚度。
-
6.发明授权Intermediate optical packages and systems comprising the same, and their uses 有权中间光学封装和包含该光学封装的系统及其用途公开(公告)号：US07732883B2
公开(公告)日：2010-06-08
申请号：US12244726
申请日：2008-10-02
申请人： Dean A. Klein , Ian Blasch
发明人： Dean A. Klein , Ian Blasch
IPC分类号： H01L31/0232
CPC分类号： H01L27/14618 , H01L27/14625 , H01L27/14687 , H01L33/58 , H01L2924/0002 , H01L2924/00
摘要： Methods and apparatuses for forming optical packages, and intermediate structures resulting from the same are disclosed, which provide an optical element over a device. The optical element is formed by applying a force to lateral portions of a liquid material layer formed below an elastomeric material layer such that the liquid material layer has a radius of curvature sufficient to direct light to a light sensitive portion of the device, after which the liquid material layer is exposed to conditions which maintain the radius of curvature after the lateral force is removed.
摘要翻译： 公开了用于形成光学封装的方法和装置以及由其组成的中间结构，其在器件上提供光学元件。 通过向形成在弹性体材料层下方的液体材料层的横向部分施加力而形成光学元件，使得液体材料层具有足以将光引导到装置的光敏部分的曲率半径，之后， 液体材料层暴露于在移除横向力之后保持曲率半径的条件。
-
7.发明授权High speed sampling of signals in active pixel sensors using buffer circuitry 有权使用缓冲电路对有源像素传感器中的信号进行高速采样公开(公告)号：US07821557B2
公开(公告)日：2010-10-26
申请号：US11473130
申请日：2006-06-23
CPC分类号： H04N5/378
摘要： Techniques are disclosed for enhancing the speed at which pixel levels are read out and sampled for processing. A method of processing pixel levels includes clamping a pixel readout line to a voltage level less than a voltage corresponding to a signal sensed by an n-MOS pixel. Subsequently, the pixel readout line is coupled to an output of an n-MOS source-follower and the pixel signal is read out onto the pixel readout line through the n-MOS source-follower. The pixel signal that was read out is passed through a p-MOS source-follower to a processing circuit. Before passing the pixel signal through the p-MOS source-follower to the processing circuit, a capacitive storage node in the processing circuit is clamped to a voltage greater than a signal at an input to the p-MOS source-follower. Subsequently, an output of the p-MOS source-follower is coupled to the processing circuit, and a signal corresponding to the pixel signal is stored by the processing circuit. Similar techniques are provided for reading out and sampling p-MOS pixels.
摘要翻译： 公开了用于增强读出和采样像素级以进行处理的速度的技术。 处理像素级的方法包括：将像素读出线夹持到小于对应于由n-MOS像素感测的信号的电压的电压电平。 随后，像素读出线耦合到n-MOS源极跟随器的输出，并且通过n-MOS源极跟随器将像素信号读出到像素读出线上。 读出的像素信号通过p-MOS源极跟随器传递到处理电路。 在将像素信号通过p-MOS源极跟随器传递到处理电路之前，处理电路中的电容性存储节点被钳位到大于p-MOS源极跟随器的输入处的信号的电压。 随后，p-MOS源极跟随器的输出耦合到处理电路，并且与像素信号对应的信号由处理电路存储。 提供了类似的技术来读取和采样p-MOS像素。
-
公开(公告)号：US07786574B2
公开(公告)日：2010-08-31
申请号：US12370490
申请日：2009-02-12
IPC分类号： H01L23/34
CPC分类号： H01L27/14618 , B33Y80/00 , H01L24/73 , H01L24/97 , H01L27/14683 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/14 , H01L2924/15153 , H01L2924/181 , H01L2924/00012 , H01L2224/85 , H01L2924/00
摘要： Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method includes providing a plurality of imaging dies on a microfeature workpiece. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes attaching a plurality of covers to corresponding imaging dies, cutting the microfeature workpiece to singulate the imaging dies, and coupling the singulated dies to a support member. The covers can be attached to the imaging dies before or after the workpiece is cut.
摘要翻译： 本文公开了使用这种方法形成微电子成像单元和微电子成像单元的方法。 在一个实施例中，一种方法包括在微特征工件上提供多个成像管芯。 各个成像管芯包括图像传感器，可操作地耦合到图像传感器的集成电路以及可操作地耦合到集成电路的多个外部触点。 该方法还包括将多个盖子附接到相应的成像管芯，切割微特征工件以分割成像管芯，以及将单个模具连接到支撑件上。 盖子可以在切割工件之前或之后连接到成像模具。
-
9.发明授权Imagers, apparatuses and systems utilizing pixels with improved optical resolution and methods of operating the same 有权使用具有改进的光学分辨率的像素和操作其的方法的成像器，设备和系统公开(公告)号：US07755121B2
公开(公告)日：2010-07-13
申请号：US11844099
申请日：2007-08-23
IPC分类号： H01L27/146
CPC分类号： H04N5/347 , H04N5/343 , H04N5/37457
摘要： A pixel array resolution is doubled by adding a plurality of second photodiodes, but only a single, common transfer control line. By controlling a combination of the single, common transfer control line and a transfer control line unique to controlling first transfer transistors in pixels in a row, first and second photodiodes in a pixel can be separately readout.
摘要翻译： 通过添加多个第二光电二极管，但仅包括单个公共传输控制线，使像素阵列分辨率加倍。 通过控制单个公共传输控制线和独特的控制行中的像素中的第一传输晶体管的传输控制线的组合，可以单独读出像素中的第一和第二光电二极管。
-
公开(公告)号：US07728892B2
公开(公告)日：2010-06-01
申请号：US12437160
申请日：2009-05-07
CPC分类号： H01L27/14603 , H01L27/14641 , H04N5/363 , H04N5/37452 , H04N5/37457
摘要： A CMOS imaging system with increased charge storage capacitance of pixels yet decreased physical size, kTC noise and active area. A capacitor is linked to the transfer gate and provides a storage node for a pixel, allowing for kTC noise reduction prior to readout. The pixel may be operated with the shutter gate on during the integration period to increase the amount of time for charge storage by a pixel.
摘要翻译： 具有增加的像素电荷存储电容的CMOS成像系统，物理尺寸减小，kTC噪声和有效面积减小。 电容器连接到传输门，并为像素提供一个存储节点，允许在读出之前降低kTC噪声。 可以在积分周期期间使快门门导通来操作像素，以增加像素对电荷存储的时间量。
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.018 秒)
