High speed sampling of signals in active pixel sensors using buffer circuitry
    1.
    发明授权
    High speed sampling of signals in active pixel sensors using buffer circuitry 有权
    使用缓冲电路对有源像素传感器中的信号进行高速采样

    公开(公告)号:US07821557B2

    公开(公告)日:2010-10-26

    申请号:US11473130

    申请日:2006-06-23

    IPC分类号: H04N3/14 H04N5/335

    CPC分类号: H04N5/378

    摘要: Techniques are disclosed for enhancing the speed at which pixel levels are read out and sampled for processing. A method of processing pixel levels includes clamping a pixel readout line to a voltage level less than a voltage corresponding to a signal sensed by an n-MOS pixel. Subsequently, the pixel readout line is coupled to an output of an n-MOS source-follower and the pixel signal is read out onto the pixel readout line through the n-MOS source-follower. The pixel signal that was read out is passed through a p-MOS source-follower to a processing circuit. Before passing the pixel signal through the p-MOS source-follower to the processing circuit, a capacitive storage node in the processing circuit is clamped to a voltage greater than a signal at an input to the p-MOS source-follower. Subsequently, an output of the p-MOS source-follower is coupled to the processing circuit, and a signal corresponding to the pixel signal is stored by the processing circuit. Similar techniques are provided for reading out and sampling p-MOS pixels.

    摘要翻译: 公开了用于增强读出和采样像素级以进行处理的速度的技术。 处理像素级的方法包括:将像素读出线夹持到小于对应于由n-MOS像素感测的信号的电压的电压电平。 随后,像素读出线耦合到n-MOS源极跟随器的输出,并且通过n-MOS源极跟随器将像素信号读出到像素读出线上。 读出的像素信号通过p-MOS源极跟随器传递到处理电路。 在将像素信号通过p-MOS源极跟随器传递到处理电路之前,处理电路中的电容性存储节点被钳位到大于p-MOS源极跟随器的输入处的信号的电压。 随后,p-MOS源极跟随器的输出耦合到处理电路,并且与像素信号对应的信号由处理电路存储。 提供了类似的技术来读取和采样p-MOS像素。

    High-speed sampling of signals in active pixel sensors
    2.
    发明授权
    High-speed sampling of signals in active pixel sensors 有权
    有源像素传感器中信号的高速采样

    公开(公告)号:US07630011B1

    公开(公告)日:2009-12-08

    申请号:US09527422

    申请日:2000-03-17

    IPC分类号: H04N3/14

    CPC分类号: H04N5/378

    摘要: Techniques are disclosed for enhancing the speed at which pixel levels are read out and sampled for processing. A method of processing pixel levels includes clamping a pixel readout line to a voltage level less than a voltage corresponding to a signal sensed by an n-MOS pixel. Subsequently, the pixel readout line is coupled to an output of an n-MOS source-follower and the pixel signal is read out onto the pixel readout line through the n-MOS source-follower. The pixel signal that was read out is passed through a p-MOS source-follower to a processing circuit. Before passing the pixel signal through the p-MOS source-follower to the processing circuit, a capacitive storage node in the processing circuit is clamped to a voltage greater than a signal at an input to the p-MOS source-follower. Subsequently, an output of the p-MOS source-follower is coupled to the processing circuit, and a signal corresponding to the pixel signal is stored by the processing circuit. Similar techniques are provided for reading out and sampling p-MOS pixels.

    摘要翻译: 公开了用于增强读出和采样像素级以进行处理的速度的技术。 处理像素级的方法包括:将像素读出线夹持到小于对应于由n-MOS像素感测的信号的电压的电压电平。 随后,像素读出线耦合到n-MOS源极跟随器的输出,并且通过n-MOS源极跟随器将像素信号读出到像素读出线上。 读出的像素信号通过p-MOS源极跟随器传递到处理电路。 在将像素信号通过p-MOS源极跟随器传递到处理电路之前,处理电路中的电容性存储节点被钳位到大于p-MOS源极跟随器的输入处的信号的电压。 随后,p-MOS源极跟随器的输出耦合到处理电路,并且与像素信号对应的信号由处理电路存储。 提供了类似的技术来读取和采样p-MOS像素。

    Readout circuit with gain and analog-to-digital conversion for image sensor
    3.
    发明授权
    Readout circuit with gain and analog-to-digital conversion for image sensor 有权
    读数电路具有图像传感器的增益和模数转换功能

    公开(公告)号:US07245321B2

    公开(公告)日:2007-07-17

    申请号:US11058426

    申请日:2005-02-16

    摘要: A CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique. Use of the readout circuit can increase the parallel structure of the overall chip, thereby reducing the bandwidth which each readout circuit must be capable of handling.

    摘要翻译: CMOS成像器包括有源像素传感器阵列,其中每个像素与阵列中相应的列相关联。 成像器还包括用于从有源传感器阵列读出像素值的多个电路。 每个读出电路可以与阵列中的相应列相关联,并且可以包括第一和第二采样和保持电路。 第一和第二采样保持电路分别与阵列中的第一和第二列像素相关联。 每个读出电路还包括基于运算放大器的电荷感测电路,其基于由第一采样保持电路或第二采样保持电路采样的信号选择性地提供放大的差分输出信号。 读出电路还具有模数转换器,用于使用逐次逼近技术将差分输出转换成对应的数字信号。 使用读出电路可以增加整个芯片的并行结构,从而减少每个读出电路必须能够处理的带宽。

    Readout circuit with gain and analog-to-digital a conversion for image sensor
    4.
    发明授权
    Readout circuit with gain and analog-to-digital a conversion for image sensor 有权
    读数电路具有图像传感器的增益和模数转换

    公开(公告)号:US06885396B1

    公开(公告)日:2005-04-26

    申请号:US09264501

    申请日:1999-03-08

    摘要: A CMOS imager includes an array of active pixel sensors, wherein each pixel is associated with a respective column in the array. The imager also includes multiple circuits for reading out values of pixels from the active sensor array. Each readout circuit can be associated with a respective pair of columns in the array and can include first and second sample-and-hold circuits. The first and second sample-and-hold circuits are associated, respectively, with first and second columns of pixels in the array. Each readout circuit also includes an operational amplifier-based charge sensing circuit that selectively provides an amplified differential output signal based on signals sampled either by the first sample-and-hold circuit or the second sample-and-hold circuit. The readout circuit also has an analog-to-digital converter for converting the differential output to a corresponding digital signal using a successive approximation technique. Use of the readout circuit can increase the parallel structure of the overall chip, thereby reducing the bandwidth which each readout circuit must be capable of handling.

    摘要翻译: CMOS成像器包括有源像素传感器阵列,其中每个像素与阵列中相应的列相关联。 成像器还包括用于从有源传感器阵列读出像素值的多个电路。 每个读出电路可以与阵列中的相应列相关联,并且可以包括第一和第二采样和保持电路。 第一和第二采样保持电路分别与阵列中的第一和第二列像素相关联。 每个读出电路还包括基于运算放大器的电荷感测电路,其基于由第一采样保持电路或第二采样保持电路采样的信号选择性地提供放大的差分输出信号。 读出电路还具有模数转换器,用于使用逐次逼近技术将差分输出转换成对应的数字信号。 使用读出电路可以增加整个芯片的并行结构,从而减少每个读出电路必须能够处理的带宽。

    Electronic Neutral Density Filter
    5.
    发明申请
    Electronic Neutral Density Filter 有权
    电子中性密度滤波器

    公开(公告)号:US20080164404A1

    公开(公告)日:2008-07-10

    申请号:US11621883

    申请日:2007-01-10

    申请人: Barmak Mansoorian

    发明人: Barmak Mansoorian

    IPC分类号: H01L27/00

    CPC分类号: H04N5/3559

    摘要: An image sensor with an electronic neutral density filter. Each pixel of the image sensor is capable of being electronically adjusted such that the total charge integration is effectively changed by an amount of the adjustment. The adjustment uses a variable capacitor, here are paper wrapped are formed by an MOS transistor. The capacitor may be within each pixel, or may be shared between multiple pixels.

    摘要翻译: 具有电子中性密度滤光片的图像传感器。 图像传感器的每个像素能够被电子调节,使得总电荷积分有效地改变了调整量。 调整使用可变电容器,这里是由MOS晶体管形成的纸张。 电容器可以在每个像素内,或者可以在多个像素之间共享。

    High resolution CMOS circuit using a marched impedance output transmission line
    6.
    发明申请
    High resolution CMOS circuit using a marched impedance output transmission line 审中-公开
    高分辨率CMOS电路采用行波阻抗输出传输线

    公开(公告)号:US20060279651A1

    公开(公告)日:2006-12-14

    申请号:US11508262

    申请日:2006-08-23

    申请人: Barmak Mansoorian

    发明人: Barmak Mansoorian

    IPC分类号: H04N5/335

    摘要: Image sensor with CMOS output, an another circuit receiving input. The circuit operates like a transmission line, in current mode, with substantially zero voltage. The impedances are matched by setting bias currents.

    摘要翻译: 具有CMOS输出的图像传感器,另一个电路接收输入。 该电路在电流模式下像传输线一样工作,基本为零电压。 通过设置偏置电流来匹配阻抗。

    High-speed sampling of signals in active pixel sensors

    公开(公告)号:US20060244855A1

    公开(公告)日:2006-11-02

    申请号:US11473130

    申请日:2006-06-23

    IPC分类号: H04N5/335 H04N3/14

    CPC分类号: H04N5/378

    摘要: Techniques are disclosed for enhancing the speed at which pixel levels are read out and sampled for processing. A method of processing pixel levels includes clamping a pixel readout line to a voltage level less than a voltage corresponding to a signal sensed by an n-MOS pixel. Subsequently, the pixel readout line is coupled to an output of an n-MOS source-follower and the pixel signal is read out onto the pixel readout line through the n-MOS source-follower. The pixel signal that was read out is passed through a p-MOS source-follower to a processing circuit. Before passing the pixel signal through the p-MOS source-follower to the processing circuit, a capacitive storage node in the processing circuit is clamped to a voltage greater than a signal at an input to the p-MOS source-follower. Subsequently, an output of the p-MOS source-follower is coupled to the processing circuit, and a signal corresponding to the pixel signal is stored by the processing circuit. Similar techniques are provided for reading out and sampling p-MOS pixels.

    Bidirectional follower for driving a capacitive load
    8.
    发明授权
    Bidirectional follower for driving a capacitive load 失效
    用于驱动电容性负载的双向跟随器

    公开(公告)号:US6043690A

    公开(公告)日:2000-03-28

    申请号:US38635

    申请日:1998-03-10

    IPC分类号: H03K17/687 H03K3/00

    CPC分类号: H03K17/6872

    摘要: A bidirectional source follower system includes an N channel transistor and P channel transistor which conduct in opposite ways. The n channel transistor is connected to quickly source current, however is relatively inefficient at sinking current. In contrast, the P channel transistor can sink current very quickly but is bad at source current. The two devices are connected together in a way which allows advantageous features of both.

    摘要翻译: 双向源极跟随器系统包括以相反方式导通的N沟道晶体管和P沟道晶体管。 n沟道晶体管连接到快速电源电流,然而在沉降电流方面效率相对较低。 相比之下,P沟道晶体管可以非常快地吸收电流,但在源极电流下不好。 两个装置以允许两者的有利特征的方式连接在一起。

    Segmented column-parallel analog-to-digital converter
    9.
    发明授权
    Segmented column-parallel analog-to-digital converter 有权
    分段列并行模数转换器

    公开(公告)号:US08816892B2

    公开(公告)日:2014-08-26

    申请号:US13656674

    申请日:2012-10-20

    IPC分类号: H03M1/34

    摘要: A successive approximation A/D converter which includes a sub ranging classifier that receives an input signal and classifies said input signal according to plural different highest resolution bits, to determine a range of the input signal, and creating a set of most significant bits based on said range, said subranging classifier also setting and determining an offset based on said range, and a successive approximation A/D converted that converting lowest resolution parts of the input signal as adjusted by the offset.

    摘要翻译: 一种逐次逼近A / D转换器,其包括接收输入信号的子测距分类器,并根据多个不同的最高分辨率位对所述输入信号进行分类,以确定输入信号的范围,以及基于 所述范围,所述子范围分类器还基于所述范围设置和确定偏移,以及逐次逼近A / D转换,其转换为通过偏移量调整的输入信号的最低分辨率部分。

    Pinned Charge Transimpedance Amplifier
    10.
    发明申请
    Pinned Charge Transimpedance Amplifier 审中-公开
    固定电荷互阻放大器

    公开(公告)号:US20130341490A1

    公开(公告)日:2013-12-26

    申请号:US13919913

    申请日:2013-06-17

    IPC分类号: H01L27/146

    摘要: A system that has plural different photodetector circuits, each photodetector circuit including its own transfer gate, and each of the plural different photodetector circuits and transfer gates commonly connected to a first node. In amplifier is used which maintains a fixed voltage edits input. The amplifier Has a first capacitance to ground in a second capacitance as a feedback between its output and input. In one embodiment, there are 16 photodetector circuits connected to the single amplifier. In embodiments, the photodetector circuits can be located in one substrate while the amplifier is located in another substrate, and the amplifier also minimizes parasitics between the substrates.

    摘要翻译: 具有多个不同光电检测器电路的系统,每个光电检测器电路包括其自身的传输门,并且多个不同的光检测器电路和传输门中的每一个共同连接到第一节点。 在使用放大器中,其保持固定的电压编辑输入。 放大器具有第二个电容的第一个接地电容,作为其输出和输入之间的反馈。 在一个实施例中,存在连接到单个放大器的16个光电检测器电路。 在实施例中,光电检测器电路可以位于一个衬底中,而放大器位于另一衬底中,并且放大器还使衬底之间的寄生效应最小化。