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公开(公告)号:US11509750B2
公开(公告)日:2022-11-22
申请号:US16132424
申请日:2018-09-16
申请人: Cavium, Inc.
IPC分类号: H04L69/22
摘要: A system with co-resident data-plane and network interface controllers embodying a method for network switching of a data packet incoming from a network at a packet input processor portion of a network interface resource comprising the packet input processor, a packet output processor, and a network interface controller, implemented on a chip, to a target entity, is disclosed. Additionally, the system embodying a method for network switching of a data packet outgoing from an internal facing interface of a network interface controller portion of the network interface resource to a network is disclosed.
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公开(公告)号:US20190068349A1
公开(公告)日:2019-02-28
申请号:US15683376
申请日:2017-08-22
申请人: Yuanbin Guo
发明人: Yuanbin Guo
摘要: Methods and apparatus for uplink control channel detection. In an exemplary embodiment, a method includes generating Top-Q Channel Quality Indicator (CQI) candidates from information received over an uplink control channel, generating a CQI symbol for each of the Top-Q CQI candidates, and generating a CQI energy metric from the CQI symbols. If the uplink control channel is formatted in format 2, then performing operations of combining the CQI energy metric with a pilot energy metric to generate a combined metric and searching the combined metric to determine transmitted CQI bits. If the control channel is formatted in format 2a or format 2b, then performing operations of generating an acknowledgement (ACK) energy metric for ACK candidates, combining the CQI energy metric, the pilot energy metric, and the ACK energy metric to generate the combined metric, and searching the combined metric to determine transmitted CQI bits and ACK bits.
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公开(公告)号:US20180349185A1
公开(公告)日:2018-12-06
申请号:US15613889
申请日:2017-06-05
申请人: Cavium, Inc.
发明人: Timothy Toshio Nakada , Jason Daniel Zebchuk , Gregg Alan Bouchard , Tejas Maheshbhai Bhatt , Hong Jik Kim , Ahmed Shahid , Mark Jon Kwong
摘要: Method and system embodying the method for programmable scheduling encompassing: enqueueing at least one command into one of a plurality of queues having a plurality of entries; determining a category of the command at the head entry of each of the plurality of queues; processing each determined non-job category command by a non-job command arbitrator; and processing each determined job category command by a job arbitrator and assignor, is disclosed.
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公开(公告)号:US20180329472A1
公开(公告)日:2018-11-15
申请号:US15595667
申请日:2017-05-15
CPC分类号: G06F1/329 , G06F9/5044 , G06F9/5094 , G06F2209/508
摘要: Methods and apparatus for adaptive power profiling in a baseband processing system. In an exemplary embodiment, an apparatus includes one or more processing engines. Each processing engine performs at least one data processing function. The apparatus also includes an adaptive power profile (APP) and a job manager that receives job requests for data processing. The job manager allocates the data processing associated with the job requests to the processing engines based on the adaptive power profile. The adaptive power profile identifies a first group of the processing engines to perform the data processing associated with the job requests, and identifies remaining processing engines to be set to a low power mode.
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公开(公告)号:US20180321983A1
公开(公告)日:2018-11-08
申请号:US15588240
申请日:2017-05-05
申请人: Cavium, Inc.
发明人: Kalyana Sundaram Venkataraman , Tejas Maheshbhai Bhatt , Hong Jik Kim , Eric Marenger , Ahmed Shahid , Jason Daniel Zebchuk , Gregg Alan Bouchard
CPC分类号: G06F9/5044 , G06F9/4881
摘要: A method and a system embodying the method for job pre-scheduling in a processing system comprising distributed job management, encompassing: determining a maximum amount of pre-schedulable jobs for each of a plurality of engines; setting for each of the plurality of engines a threshold less than or equal to the maximum amount; pre-scheduling by a scheduler an amount of jobs less than or equal to the threshold to at least one of a plurality of job managers; determining at the at least one of the plurality of job managers managing one of the plurality of engines one of a plurality of data processing devices in order for each pre-scheduled job; and assigning the job to the determined data processing device.
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公开(公告)号:US10103993B2
公开(公告)日:2018-10-16
申请号:US15862509
申请日:2018-01-04
申请人: Cavium, Inc.
发明人: Martin Leslie White
IPC分类号: H04L12/803 , G06F9/50 , H04L12/26 , H04L12/801
摘要: A data processing system includes a phantom queue for each of a plurality of output ports each associated with an output link for outputting data. The phantom queues receive/monitor traffic on the respective ports and/or the associated links such that the congestion or traffic volume on the output ports/links is able to be determined by a congestion mapper coupled with the phantom queues. Based on the determined congestion level on each of the ports/links, the congestion mapper selects one or more non or less congested ports/links as destination of one or more packets. A link selection logic element then processes the packets according to the selected path or multi-path thereby reducing congestion on the system.
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公开(公告)号:US10083200B2
公开(公告)日:2018-09-25
申请号:US13831415
申请日:2013-03-14
申请人: Cavium, Inc.
IPC分类号: G06F17/30
CPC分类号: G06F16/235 , G06F16/11 , G06F16/21
摘要: A system, apparatus, and method are provided for adding, deleting, and modifying rules in one update from the perspective of an active search process for packet classification. While a search processor searches for one or more rules that match keys generated from received packets, there is a need to add, delete, or modify rules. By organizing a plurality incremental updates for adding, deleting, or modifying rules into a batch update, several operations for incorporating the incremental updates may be made more efficient by minimizing a number of updates required.
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公开(公告)号:US10082538B2
公开(公告)日:2018-09-25
申请号:US14617546
申请日:2015-02-09
申请人: CAVIUM, INC.
IPC分类号: G01R31/3177 , G06F17/50 , G06F11/36 , G01R31/317 , G01R31/3183 , G06F11/22 , G06F11/263 , H04L12/26
CPC分类号: G01R31/3177 , G01R31/31727 , G01R31/318314 , G06F11/2273 , G06F11/261 , G06F11/263 , G06F11/364 , G06F17/5009 , G06F17/5081 , H04L43/14 , H04L43/50
摘要: A testbench for testing a device under test (DUT), wherein the testbench has a verification environment including a reference model, a scoreboard and a customized agent for each interface that the DUT needs to receive input from and/or transmit output on. The testbench system is able to be generated by a testbench builder that automatically creates a scoreboard, a reference model, a dispatcher and generic agents including generic drivers, loopback ports, sequencers and/or generic monitors for each interface and then automatically customize the generic agents based on their corresponding interface such that the agents meet the requirements of the interface for the DUT.
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公开(公告)号:US10025740B2
公开(公告)日:2018-07-17
申请号:US15265252
申请日:2016-09-14
申请人: CAVIUM, INC.
发明人: Ramarao Kopparthi
摘要: A new approach is proposed to offload of link aggregation from a host to a HBA in SRIOV mode. The HBA first creates one or more link aggregation offload engines each having one or more physical ports and to establish a first link between a VM running on the host and one of the link aggregation offload engines for network data transmission with the VM. Once a data packet is received from the VM over the first link, the link aggregation offload engine chooses a first physical port based on its link aggregation method and establish a second link with the chosen first physical port to transmit the packet out of the HBA. If the second link fails, the link aggregation offload engine then chooses a second physical ports and establish a third link with the chosen second physical port to transmit the packet out of the HBA device instead.
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公开(公告)号:US10013357B2
公开(公告)日:2018-07-03
申请号:US15269072
申请日:2016-09-19
申请人: Cavium, Inc.
IPC分类号: G06F12/00 , G06F12/0862 , G06F12/0897 , G06F13/00 , G06F13/28
CPC分类号: G06F12/0862 , G06F12/0897 , G06F2212/1016 , G06F2212/6024 , G06F2212/6026
摘要: Managing memory access requests to a cache system including one or more cache levels that are configured to store cache lines that correspond to memory blocks in a main memory includes: storing stream information identifying recognized streams that were recognized based on previously received memory access requests, where one or more of the recognized streams comprise strided streams that each have an associated strided prefetch result corresponding to a stride that is larger than or equal to a size of a single cache line; and determining whether or not a next cache line prefetch request corresponding to a particular memory access request will be made based at least in part on whether or not the particular memory access request matches a strided prefetch result for at least one strided stream, and a history of past next cache line prefetch requests.
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