3D memory with conductive dielectric channel integrated with logic access transistors

    公开(公告)号:US12133387B2

    公开(公告)日:2024-10-29

    申请号:US17556943

    申请日:2021-12-20

    摘要: Three-dimensional (3D) memory structures and methods to manufacture 3D memory structures are disclosed. A method includes forming a stack of layers including a first sub-stack for a first transistor structure, comprised of a first conductive layer, a gate layer, and a second source/drain layer. The stack of layers can include a second sub-stack for a memory structure positioned on the first sub-stack, the second sub-stack including at least one layer of conductive material and at least one layer of non-conductive material, and a third sub-stack for a second transistor structure. The method includes forming a channel opening in the stack of layers, providing a first channel structure within the channel opening, forming a memory dielectric layer in the channel opening and aligned with the memory structure, and providing a second channel structure in the channel opening in contact with the memory dielectric layer and aligned with the second transistor structure.

    Power conversion device and motor

    公开(公告)号:US12132410B2

    公开(公告)日:2024-10-29

    申请号:US17785794

    申请日:2020-11-27

    发明人: Shoho Ishikawa

    IPC分类号: H02M7/00 H05K9/00

    CPC分类号: H02M7/003 H05K9/0009

    摘要: A device includes a circuit board, a power conversion module disposed to face the circuit board, a bus bar connected to the power conversion module, and a shielding portion that shields an electromagnetic wave. The bus bar extends through a side edge of the circuit board from one side to an opposite side of the circuit board along a thickness direction of the circuit board. The shielding portion is disposed between the bus bar and the side edge of the circuit board, extends from the one side to the opposite side along the thickness direction of the circuit board, and extends to both sides of the bus bar along the side edge of the circuit board.

    Systems and methods for storing mutable user data in an non-fungible token (NFT)

    公开(公告)号:US12131311B2

    公开(公告)日:2024-10-29

    申请号:US18060991

    申请日:2022-12-02

    IPC分类号: G06Q20/36 G06Q20/38

    摘要: In some embodiments, storing mutable user data in a Non-Fungible Token (NFT) may be facilitated. In some embodiments, user specific information for a user may be received. The user specific information may comprise data for a plurality of data fields. A status parameter for each data field of the plurality of data fields may be generated, where the status parameter is related to the accuracy of data for a respective data field. The system may generate, via a blockchain platform service, an NFT comprising the plurality of data fields and the status parameters. The system may then determine whether data associated with a first data field is (i) current based on a first status parameter and (ii) mutable. In response to determining that the data associated with the first data field is (i) not current and (ii) mutable, a first action may be performed.

    Systems and methods for integrated circuit layout

    公开(公告)号:US12131108B2

    公开(公告)日:2024-10-29

    申请号:US18518167

    申请日:2023-11-22

    发明人: Kenan Yu Qingwen Deng

    摘要: A method for providing an IC design is disclosed. The method includes receiving and synthesizing a behavioral description of an IC design; generating, based on the synthesized behavioral description, a layout for the IC design; performing at least a timing analysis on the layout; accessing, based on the timing analysis, a first cell library including a plurality of transistor-based cells, each having one or more transistors and associated with a respective first delay value; accessing, based on the timing analysis, a second cell library including a plurality of non-transistor-based cells, each having no transistor and associated with a respective second delay value; and updating the layout by at least one of inserting one or more of the plurality of transistor-based cells or inserting one or more of the plurality of non-transistor-based cells.

    Steering assembly for vehicle
    10.
    发明授权

    公开(公告)号:US12128977B2

    公开(公告)日:2024-10-29

    申请号:US18229250

    申请日:2023-08-02

    CPC分类号: B62D7/163 B62D7/18 B62D7/20

    摘要: A vehicle includes a chassis and a front axle assembly. The chassis includes a first frame rail defining a first vertical plane and a second frame rail defining a second vertical plane. The front axle assembly includes an axle and a steering assembly. The axle is coupled to a front end of the first frame rail and the second frame rail. The steering assembly includes a pair of wheel hubs coupled to opposing ends of the axle, a steering gear mechanism including a first gear box and a second gear box, and a linkage assembly coupling the steering gear mechanism to the pair of wheel hubs to facilitate steering the pair of wheel hubs through actuation of the steering gear mechanism. The first gear box and the second gear box are positioned between the first vertical plane and the second vertical plane.