Abstract:
In accordance with the present invention, a conventional area image sensor of the interline transfer type is so configured as to be readable in blocks of adjacent photosite rows, thereby enabling the modified sensor to be read out at fast frame rates. The resulting sensor, although designed for block readout, can be produced using conventional manufacturing processes.
Abstract:
A charge-coupled device having an improved charge-transfer efficiency over a broad temperature range. The device comprises a substrate of semiconductor material of one conductivity type; a first buried channel formed in the substrate and of a conductivity type opposite to that of the substrate; a second buried channel of a conductivity type opposite to that of the substrate formed in the same region of the substrate as the first buried channel and having a greater depth of penetration into the substrate than the first buried channel; compensated regions formed at intervals in the buried channels providing a means for containing individual packets of charge and shaped for inducing a narrow channel effect and for producing a fringing electric field in a direction of charge transfer in uncompensated buried channel regions; electrode gates associated with each pair of adjoining compensated and uncompensated regions in the device; and means for clocking the electrodes for causing a string of charge packets to be transferred through the device.
Abstract:
A plurality of linear image sensors of a contact array scanner are read out at relatively low sensor pixel rates using only a limited number of expensive digital components. For a contact array scanner having sensors with both forward and reverse readouts, outputs are selected and read together in parallel from successive pairs of forward sensor readouts. Individual outputs from each of the forward readout pairs are sequentially sampled and held and the samples from each of the forward readout pairs are digitized. Outputs are also selected and read together in parallel from successive pairs of reverse sensor readouts. Individual outputs from each of the reverse readout pairs are sequentially sampled and held and the samples from each of the reverse readout pairs are digitized. Digitized samples from successive ones of the forward readout pairs are written into alternate ones of two pairs of first in first out digital memories and digitized samples from the reverse readout pairs are written into alternate ones of two pairs of last in first out memories. Finally, the contents of each pair of first in first out memories and the contents of each pair of last in first out memories are read out while the next pairs of digitized samples are being written into the other sets of first in first out and last in first out digital memories.
Abstract:
An image sensing element in a solid state imaging device is provided with a plurality of superposed channels disposed at respective distances from a light receiving surface of the device, each of such channels having a different characteristic spectral response due to the differential absorption of light by a semiconductor. By so disposing the channels, the device becomes a color imaging sensor having optimized resolution. The top channel, i.e. the channel nearest the surface of the device, may be either a "surface" channel or a "buried" channel, the lower channel(s) being buried channels. Depending upon the design of the element, either electrons or holes may be accumulated as photocharges in respective superposed channels. The color photocharges generated in respective channels of such an image sensing element are simultaneously moved in a plurality of superposed channels by a multiple superposed channel signal handling device such as a multiple channel charge coupled device (CCD), thus the solid state imaging device does not require special timing networks to correct for phase differences between color signals which result from a common point within an image.
Abstract:
A multiple, superposed-channel, solid-state, color image sensor of the "parallel transfer" type includes a plurality of superposed generally "ladder shaped" channels in a semiconductor substrate. One "side rail" of the ladder shape provides the channel structure for a multiple, superposed-channel signal handling device, such as a charge coupled shift register. The "rungs" of the ladder shape provide a plurality of multiple, superposed-channel color image sensing sites, and the other "side rail" of the ladder shape provides a plurality of superposed "anti-bloom" drains, one drain per channel. Electrical contact to a buried channel is provided by a V-groove etching technique. A V-groove extending from the surface of the device into the buried channel provides physical access to the buried channel. A conductor, in ohmic contact with the channel, extends from the bottom of the V-groove to the surface of the device to provide electrical contact with the buried channel.
Abstract:
An interline transfer type area image sensor is described which can selectively operate in either an interlaced or non-interlaced read-out mode. The sensor includes a plurality of vertical CCD shift registers. Each shift register has an ion implanted shift transfer barrier or storage regions such that only one layer of gate electrode is required by each voltage clock, and a structure for selectively applying voltages to the clock lines for alternate rows of one or both of the vertical shift register electrodes.
Abstract:
A solid-state image sensor includes a substrate of a semiconductor material of one conductivity type having a surface. A plurality of spaced, parallel CCDs are in the substrate at the surface. Each CCD includes a channel region of the opposite conductivity type in the substrate and a plurality of conductive gates extending across and insulated from the channel region. The conductive gates extend laterally across the channel regions of all of the CCDs and divide the channel regions into a plurality of phases and pixels. A drain region of the opposite conductivity type is in the substrate at the surface and extends along the channel region of at least one of the CCDs. A separate overflow channel region of the opposite conductivity type is in the substrate at said surface and extends from each of the CCD channel region phases to the adjacent drain region. A separate overflow barrier region of the one conductivity type is in the substrate and extends across an overflow channel region between the CCD channel region and the drain to control the flow of charge carriers from each phase of the CCD channel region to the drain. Each of the CCDs may have a separate drain region or two adjacent CCDs may share a common drain region. A CCD barrier region extends across the channel region in each phase. The CCD barrier region contains the same impurity concentration as the overflow-barrier region of its respective phase and may be connected to the overflow-barrier region.
Abstract:
An interline area image sensor structure with particular doping arrangements which provides an effective antiblooming control and, when a voltage signal is applied to each transfer gate, all the charge collected in a photodiode will be depleted and transferred to an interline CCD.