Abstract:
Apparatus is provided for processing sparse vectors between the memory and calculator portions of a computer. First and second sparse vectors, each containing operands corresponding to nonzero terms of a respective operand vector, are processed to an aligning means which aligns the operands of the vectors on a first-in basis. First and second order vectors, each containing bits whose binary ones may correspond to the non-zero terms of the respective operand vector and whose binary zeros may correspond to the zero-valued terms of the respective operand vector, are processed through logic apparatus to selectively gate the aligning means to process an operand from a sparse vector whenever a binary one bit appears in a corresponding order vector. The first and second order vectors may also be utilized to generate a third order vector for a resultant sparse vector.
Abstract:
Apparatus and method for erasing a selected gas discharge cell located between one of a plurality of X electrodes and one of a plurality of Y electrodes. Erasure is performed with noncoincident pulses and is particularly well suited for use with a sustaining pulse generator of the type which alternately applies sustaining pulses of a preselected amplitude and polarity to all the X electrodes and then to all the Y electrodes, since the sustaining pulse may be used as the conditioning pulse and with a slight modification as the erase pulse on the Y electrode.
Abstract:
Buffer apparatus is provided between the memory and calculator portions of a computer to selectively buffer vectors for optimum system timing. The first arriving of a plurality of operand vectors are stored in the buffer until the later arriving vector arrives, at which time both vectors are forwarded to the calculator portion. The buffering also accepts operands to compensate for system timing. Upon return of the resultants, the resultant vector is selectively buffered to assure proper storage of the resultant vector without adversely affecting reading of the operand vectors. Also, to optimize timing and minimize equipment and delays, control apparatus is provided to selectively additionally buffer operand vectors depending upon the time of arrival of the resultant vector.
Abstract:
A planar plasma discharge panel comprises a first group of electrical conductors secured to an electrically non-conducting substrate. A layer of electrically non-conducting dielectric material is secured to said substrate and to said conductors to form an electrically non-conductive surface thereover. A second group of electrical conductors is secured to said surface. The conductors of the second group cross the conductors of the first group at an angle so that the crossover areas of said conductors define discharge points of the plasma display panel. A second layer of electrically non-conductive dielectric material is secured to the first surface layer and to the second group of electrical conductors. An appropriate ionizable gas medium is confined above this second layer of dielectric material. The discharge pattern generated by the device is from point to point on the dielectric surface of the second layer of electrically non-conductive material with the desired electrical fields being generated by the underlying grid of conductors. The gaseous medium is selected for the desired discharge characteristics of the panel. Several embodiments are shown for controlling the discharge so as to improve panel resolution.
Abstract:
A computer system according to the present disclosure includes a plurality of individual processors and an interlock register connected to the processors for process control independent of memory. One aspect of the disclosure resides in a ''''universal'''' register technique and apparatus wherein the main registers of each processor are selectively operated in a plurality of modes. Another aspect of the disclosure resides in an addressing technique and apparatus wherein a reference address of an object program is selectively added to addresses of programs inside and outside of the field length of the object program to obtain the absolute address of the program. Absolute addresses of resident programs, however, are handled by not adding the reference address to the resident program address.
Abstract:
A circuit for blanking unwanted error-causing peaks in the waveform derived from the reading of high density magnetic recordings wherein the data waveform is filtered by a low pass filter and variable Q resonant filter to generate a rectangular wave blanking signal applied to a flip-flop together with the equalized signal, whereby false peaks in the equalized signal are prevented from triggering the flip-flop by the blanking signal.
Abstract:
A MAAGNETIC RECORDING MEDIUM AND A METHOD OF PRODUCING IT WHICH PERMITS THE PRODUCTION OF A MAGNETIC RECORDING MEDIUM HAVING A HIGH INTRINSIC COERCIVITY GREATER THAN 300 OERSTEDS AND AN 0.95 SQUARE B-H HYSTERESIS LOOP PERMITTING HIGH SWITCHING SPEEDS AND HIGH DENSITY RECORDING. THE MAGNETIC RECORDING MEDIUM COMPRISES AN ALUMINUM ALLOY DISC SUBSTRATE COVERED BY XINC AND NICKEL LAYERS, OVERLAID BY A GOLD FILM AND THIN-FILM COBALT MAGNETIC LAYER. THE FABRICATION PROCESS INVOLVES ELECTROLESS DEPOSITION OF THIN-FILM LAYERS OF ZINC AND NICKEL ON THE SUBSTRATE, THEN THE DEPOSITION OF A ONE-HALF MICRO-INCH GOLD LAYER CONVERTED BY A COBBALT PHOSPHORUS THIN-FILM LAYER. THE METHOD PROVIDES FOR TAILORING OF THE VALUE OF COERCIVITY INDEPENDENT OF THE THICKNESS OF THE MAGNNETIC FILM LAYER.
Abstract:
Apparatus for compensating for the thermally induced dimensional variations in an arm carrying the read/write head and the recording disc having tracks on its flat surface which are accessed by the head in storing and retrieving data. The device has expansion members which simulate the dimensional variations in the arm and disc, thereby providing an accurate signal correction.
Abstract:
The invention comprises apparatus for assigning priority among several data channels being multiplexed into one data bus. Priority is based partly on recent usage history, and is increased for those channels having frequent recent use. Additionally, those channels which have requested, but have not received service are given continually increasing priority until service is granted.
Abstract:
A data communications apparatus for the transmission and receipt of data. Data provided from a data processing system is modulated on two non-interfering in-phase and quadrature channels utilizing time overlapped pulses on each channel. Data modulate a digitally generated transmission signal, the two channels and carrier information being adapted to be transmitted over voice grade communication lines. Received data are detected by single sideband detection techniques, equalized for differential delay distortion effects and serially output to a receiving data processing device.