Abstract:
An electroless plating apparatus is provided. The electroless plating apparatus includes a wafer holder; a chemical dispensing nozzle over the wafer holder; a conduit connected to the chemical dispensing nozzle; and a radiation source over the wafer holder.
Abstract:
A system for use in manufacturing semiconductor devices, is provided. The system includes an electrochemical processing tool and an image sensor. The electrochemical processing tool includes an electrode located at a central region of a platen. The electrode is adapted for contacting a wafer workpiece during certain processing of the wafer workpiece using the tool. At least part of the electrode is viewable from above the platen when the electrochemical processing tool is operably assembled. The image sensor is capable of capturing an image of the viewable part of the electrode. The image sensor is positioned above the platen. The image sensor is adapted to be aimed at the electrode when an image of the electrode is to be taken with the image sensor.
Abstract:
An electroless plating apparatus is provided. The electroless plating apparatus includes a wafer holder; a chemical dispensing nozzle over the wafer holder; a conduit connected to the chemical dispensing nozzle; and a radiation source over the wafer holder.
Abstract:
A reset signal filter includes a power voltage detector and a reset signal detector or includes only one reset signal detector. The power voltage detector includes a comparators and a basic logic gates (e.g. AND gate, OR gate, inverter, etc). The reset signal detector includes a comparator, N flip flops connected in series, an AND gate, an OR gate, a multiplexer and an output flip flop. The reset signal filter receives a first reset signal generated by a power voltage detector or a Schmitt trigger buffer and utilizes N flip flops to register the signal level of the first reset signal for N clock periods. Then the reset signal filter determines if the first rest signal is changed during N clock periods, and outputs a second reset signal.
Abstract:
A data trigger reset device for an electronic device is provided in order to avoid system errors due to out-of-sequence reset on electronic devices of an electronic system. The data trigger reset device includes a voltage converter and a voltage comparator. The voltage converter receives an input signal and then converts the input signal to generate a data voltage signal. The voltage comparator is coupled to the voltage converter and is used for comparing the data voltage signal with a reference voltage to generate a reset signal for resetting the electronic device.
Abstract:
A cleaning composition including a polyamino carboxylic salt, an acid and water is provided. The content of the polyamino carboxylic salt is 0.01 wt % to 0.5 wt %. The content of the acid is 0.01 wt % to 0.5 wt %. The remaining portion of the cleaning composition is water.
Abstract:
An apparatus for manufacturing integrated circuits on a wafer includes a polish pad; a rinse arm movable over the polish pad; and a post-polish cleaner. The post-polish cleaner includes a brush for brushing the wafer; and a nozzle aiming at the wafer. The apparatus further includes a mixer configured to mix an additive and de-ionized water; and a pipe connecting the mixer to at least one of the rinse arm and the nozzle.
Abstract:
A reset signal filter includes a power voltage detector and a reset signal detector or includes only one reset signal detector. The power voltage detector includes a comparators and a basic logic gates (e.g. AND gate, OR gate, inverter, etc). The reset signal detector includes a comparator, N flip flops connected in series, an AND gate, an OR gate, a multiplexer and an output flip flop. The reset signal filter receives a first reset signal generated by a power voltage detector or a Schmitt trigger buffer and utilizes N flip flops to register the signal level of the first reset signal for N clock periods. Then the reset signal filter determines if the first rest signal is changed during N clock periods, and outputs a second reset signal.
Abstract:
An apparatus for manufacturing integrated circuits on a wafer includes a polish pad; a rinse arm movable over the polish pad; and a post-polish cleaner. The post-polish cleaner includes a brush for brushing the wafer; and a nozzle aiming at the wafer. The apparatus further includes a mixer configured to mix an additive and di-ionized water; and a pipe connecting the mixer to at least one of the rinse arm and the nozzle.
Abstract:
A chemical mechanical polish system for polishing a wafer includes a polishing head; an inner tube connected to the polishing head, wherein the inner tube is filled with a heat media; a media heater connected to the inner tube; and a pressure controller connected to the inner tube.