公开(公告)号：US07995659B2

公开(公告)日：2011-08-09

申请号：US11624959

申请日：2007-01-19

申请人： Chih-Chieh Chen ,  Chih-Hung Li ,  Wen-Hsiao Peng ,  Tihao Chiang

发明人： Chih-Chieh Chen ,  Chih-Hung Li ,  Wen-Hsiao Peng ,  Tihao Chiang

IPC分类号： H04N1/00 ,  H04B1/00

CPC分类号： H04N19/43

摘要： A prediction module includes a computation control unit and first to sixth processing units. The computation control unit arranges the pixels of a reference block outputted by a frame buffer appropriately according to data decoded by an entropy decoder into first and second pixel signals, and outputs the same to the first to sixth processing units in units of cycles. The processing units are controlled by the computation control unit to respectively complete corresponding computations in a cycle, and to use the computation results as values of first to sixth output signals to be correspondingly outputted in a next cycle. The computation control unit receives the first to sixth output signals, and computes the output signals so as to obtain pixel values of a macroblock to be predicted.

摘要翻译： 预测模块包括计算控制单元和第一至第六处理单元。 计算控制单元将由帧缓冲器输出的参考块的像素根据由熵解码器解码的数据适当地排列成第一和第二像素信号，并以循环为单位将其输出到第一至第六处理单元。 处理单元由计算控制单元控制以分别在一个周期内完成相应的计算，并且使用计算结果作为第一至第六输出信号的值在下一个周期中相应地输出。 计算控制单元接收第一至第六输出信号，并计算输出信号，以获得要预测的宏块的像素值。

公开(公告)号：US20100295881A1

公开(公告)日：2010-11-25

申请号：US12783983

申请日：2010-05-20

申请人： Being-Kung Yao ,  Ailen Li ,  Chih-Chieh Chen ,  Mei-Hwei Chang

发明人： Being-Kung Yao ,  Ailen Li ,  Chih-Chieh Chen ,  Mei-Hwei Chang

IPC分类号： B41J2/01

CPC分类号： B41M7/0027 ,  B41M3/06 ,  B41M5/0047 ,  B41M5/0064 ,  B41M5/52 ,  B44F11/02

摘要： A method for simulating, fabricating, or duplicating an oil painting is provided. The oil painting digital image information is acquired by scanning or capturing an oil painting surface image, and/or digitally simulating or rendering an oil painting surface image. A white paint is daubed on a base layer. A stereoscopic oil relief model, forming a stereoscopic oil relief layer, is acquired by topographically scanning the oil painting surface in three dimensions, and simulated or duplicated onto the base layer with a white or colorless transparent composite material. An image receiving layer is daubed on the stereoscopic oil relief layer. The oil image information, forming a printed oil painting surface image, is output and printed onto the image receiving layer with an inkjet printer. A transparent resin layer is daubed on the printed oil painting surface image, protecting the printed oil painting surface image with stereoscopic oil relief layer.

摘要翻译： 提供了一种用于模拟，制造或复制油画的方法。 油画数字图像信息通过扫描或捕获油画表面图像，和/或数字模拟或呈现油画表面图像来获取。 一个白色涂料涂在基层上。 形成立体油浮雕层的立体油浮雕模型是通过在三维上通过地面扫描油画表面而获得的，并用白色或无色的透明复合材料模拟或复制到基底层上。 图像接收层被涂覆在立体浮油层上。 形成印刷油画面图像的油画图像信息用喷墨打印机输出并印刷到图像接收层上。 将透明树脂层涂布在印刷油画表面图像上，用立体浮油层保护印刷油画面图像。

公开(公告)号：US20100253382A1

公开(公告)日：2010-10-07

申请号：US12688025

申请日：2010-01-15

申请人： Chung-Hsing Wang ,  Chih-Chieh Chen ,  Yi-Wei Chen

发明人： Chung-Hsing Wang ,  Chih-Chieh Chen ,  Yi-Wei Chen

IPC分类号： G01R31/36 ,  G01R31/02 ,  H03K3/03

CPC分类号： H03K5/159 ,  G01R31/2884 ,  G01R31/3187

摘要： A system and method for observing threshold voltage variations are provided. A ring oscillator circuit comprises a plurality of inverters arranged in a sequential loop, a plurality of test circuits having devices under test, each coupled between a respective one of the inverters and a power supply. Each test circuit has a bypass field effect transistor (FET) having a first channel coupled between the power supply and a respective one of the inverters responsive to an individual enable signal, and a FET device under test having a second channel arranged in parallel to the first channel. A method is described for determining the threshold voltage of the device under test by disabling, for one of the inverters in the ring oscillator, the first FET device such that the device under test is coupled between the power supply and the respective inverter and affects the operating frequency of the ring oscillator.

摘要翻译： 提供了一种用于观察阈值电压变化的系统和方法。 环形振荡器电路包括以顺序环路布置的多个反相器，多个具有被测器件的测试电路，每个测试电路耦合在相应的一个逆变器和电源之间。 每个测试电路具有旁路场效应晶体管（FET），该旁路场效应晶体管（FET）具有耦合在电源之间的第一通道和响应于单独使能信号的相应的一个反相器;以及被测试的FET器件，其具有与 第一频道 描述了一种用于通过对环形振荡器中的一个反相器中的第一FET器件禁止使得被测器件耦合在电源和相应的反相器之间而影响被测器件的阈值电压的方法， 环形振荡器的工作频率。

公开(公告)号：US20100242008A1

公开(公告)日：2010-09-23

申请号：US12728728

申请日：2010-03-22

申请人： Hung-Yi LIU ,  Chung-Hsing WANG ,  Chih-Chieh CHEN ,  Jian-Yi LI

发明人： Hung-Yi LIU ,  Chung-Hsing WANG ,  Chih-Chieh CHEN ,  Jian-Yi LI

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5081

摘要： A method for dummy metal and dummy via insertion is provided. In one embodiment, dummy metals are inserted using a place and route tool, where the place and route tool has timing-awareness. Then, dummy vias arrays are inserted inside an overlap area of dummy metals using a design-rule-checking utility. Fine-grained dummy vias arrays are inserted in available space far away from main patterns. The dummy-patterns resulting from the inserted dummy vias are compressed using the design-rule-checking utility to reduce the size of a graphic data system file generated from the integrated circuit design. The dummy vias can be inserted with relaxed via spacing rules. The dummy metals are inserted with a constant line-end spacing between them for better process control and the maximum length of the dummy metal can be limited for smaller coupling effects. The dummy vias can have various sizes and a square or rectangular shape.

摘要翻译： 提供了一种用于虚拟金属和虚拟通孔插入的方法。 在一个实施例中，使用地点和路线工具插入虚拟金属，其中地点和路线工具具有时间意识。 然后，使用设计规则检查实用程序将虚拟过孔阵列插入到虚拟金属的重叠区域内。 细粒度的虚拟通孔阵列插入到远离主图案的可用空间中。 使用设计规则检查实用程序对插入的虚拟通孔产生的虚拟模式进行压缩，以减小从集成电路设计生成的图形数据系统文件的大小。 虚拟通孔可以放松通过间隔规则插入。 虚拟金属以它们之间的恒定的线端间隔插入，以获得更好的工艺控制，并且可以限制虚拟金属的最大长度以减小耦合效应。 虚拟通孔可以具有各种尺寸和正方形或矩形形状。

公开(公告)号：US07377187B2

公开(公告)日：2008-05-27

申请号：US11225063

申请日：2005-09-14

申请人： Chane-Yu Lai ,  Sheng-Hsiu Huang ,  Jia-Yun Lin ,  Chih-Chieh Chen

发明人： Chane-Yu Lai ,  Sheng-Hsiu Huang ,  Jia-Yun Lin ,  Chih-Chieh Chen

IPC分类号： G01N1/22

CPC分类号： G01N1/2208 ,  B01D45/08 ,  G01N1/2273 ,  G01N15/0255 ,  G01N2015/0261

摘要： An aerosol size-selective impactor for reducing particle bounce includes a main structure, a buffering layer, and a dehydration preventing layer. This main structure with an inlet and an outlet has a central channel and a receiving cavity. There are many nozzles in the inlet. The buffering layer is filled in the receiving cavity. The dehydration preventing layer is coated on the buffering layer for reducing the dehydration of water contained in the buffering layer. So, this invention utilizes the design of the receiving cavity to receive both layers. Its accuracy is high. Its sampling time lasts longer. It can endure vibrations. This invention can yield the particle bounce effect with lower cost. And, its application scope is wide.

摘要翻译： 用于减少颗粒反弹的气溶胶大小选择性冲击器包括主结构，缓冲层和防脱水层。 具有入口和出口的主要结构具有中心通道和接收腔。 入口处有许多喷嘴。 缓冲层填充在接收腔中。 脱水防止层被涂覆在缓冲层上，用于减少缓冲层中所含的水的脱水。 因此，本发明利用接收腔的设计来接收两层。 它的准确性很高。 其采样时间更长。 它可以忍受振动。 本发明可以以较低的成本产生颗粒反弹效果。 其应用范围广泛。

公开(公告)号：US07337759B1

公开(公告)日：2008-03-04

申请号：US11543111

申请日：2006-10-05

申请人： Yung-ching Chen ,  Chih-chieh Chen

发明人： Yung-ching Chen ,  Chih-chieh Chen

IPC分类号： F02B75/32

CPC分类号： F01B7/20 ,  F01B9/06 ,  F02B75/30 ,  F02B2075/025 ,  F02B2275/22

摘要： The invention involves an engine that the cylinder block contains a coupled piston formed by a main piston, an external piston. The external piston is sleeved outside of the main piston and uses the rods on the two sides to connect to the heart-shape groove on the two sides of the crankshaft inside the crankcase at the bottom of the cylinder block. It moves with the main piston in an upward stroke and in a downward stroke. It forms a direct fuel injection device in the cylinder without carburetor. It does not need to add lubricants in the fuels. Besides, the engine has increased compression ratio.

摘要翻译： 本发明涉及一种发动机，该气缸体包含由主活塞，外部活塞形成的联接活塞。 外部活塞套在主活塞的外侧，并使用两侧的杆连接到气缸体底部曲轴箱内曲轴两侧的心形槽。 它随着主活塞向上冲程和向下冲程而移动。 它在没有化油器的气缸中形成直接燃料喷射装置。 它不需要在燃料中添加润滑剂。 此外，发动机具有增加的压缩比。

公开(公告)号：US06662764B2

公开(公告)日：2003-12-16

申请号：US10138270

申请日：2002-05-06

申请人： Yung-ching Chen ,  Chih-chieh Chen

发明人： Yung-ching Chen ,  Chih-chieh Chen

IPC分类号： F02B2514

CPC分类号： F01M1/12 ,  F02B25/14 ,  F02B61/02 ,  F02B2075/025

摘要： This invention relates to an improvement of two stroke engine in which a sleeve piston is employed to move up and down in the cylinder and to control alternatively the opening and closing of the intake guide and exhaust guide and to prevent the lubricant from exuding out of the crank case in an effort to ensure an environmental-friendly clean exhaust.

摘要翻译： 本发明涉及二冲程发动机的改进，其中套筒活塞用于在气缸中上下移动，并且可选择地控制进气导向和排气导向件的打开和关闭，并防止润滑剂渗出 曲柄箱，以确保环保清洁排气。

公开(公告)号：US08796084B2

公开(公告)日：2014-08-05

申请号：US12776011

申请日：2010-05-07

申请人： Hung Chih Tsai ,  Chih Chieh Chen ,  Sheng Chen Chung ,  Kong Beng Thei ,  Harry Chuang

发明人： Hung Chih Tsai ,  Chih Chieh Chen ,  Sheng Chen Chung ,  Kong Beng Thei ,  Harry Chuang

IPC分类号： H01L21/8238 ,  H01L21/311 ,  H01L29/78 ,  H01L29/66 ,  H01L29/165

CPC分类号： H01L21/31144 ,  H01L21/823814 ,  H01L21/82385 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： A method for removing hard masks on gates in a semiconductor manufacturing process is conducted as follows. First of all, a first gate and a second gate with hard masks are formed on a semiconductor substrate, wherein the second gate is larger than the first gate. The first gate and second gate could be associated with silicon-germanium (SiGe) source and drain regions to form p-type transistors. Next, a photoresist layer is deposited, and an opening of the photoresist layer is formed on the hard mask of the second gate. Then, the photoresist layer on the first and second gates is removed completely by etching back. Because there is no photoresist residue, the hard masks on the first and second gates can be removed completely afterwards.

摘要翻译： 如下进行半导体制造工序中的门上去除硬掩模的方法。 首先，在半导体衬底上形成具有硬掩模的第一栅极和第二栅极，其中第二栅极大于第一栅极。 第一栅极和第二栅极可以与硅 - 锗（SiGe）源极和漏极区域相关联以形成p型晶体管。 接下来，沉积光致抗蚀剂层，并且在第二栅极的硬掩模上形成光致抗蚀剂层的开口。 然后，通过蚀刻完全去除第一和第二栅极上的光致抗蚀剂层。 因为没有光致抗蚀剂残留物，所以第一和第二栅极上的硬掩模可以被完全去除。

公开(公告)号：US08232824B2

公开(公告)日：2012-07-31

申请号：US12688741

申请日：2010-01-15

申请人： Chung-Hsing Wang ,  Chih-Chieh Chen ,  Chih Sheng Tsai ,  Shu Yi Ying

发明人： Chung-Hsing Wang ,  Chih-Chieh Chen ,  Chih Sheng Tsai ,  Shu Yi Ying

IPC分类号： H03K3/017

CPC分类号： H03K5/1565 ,  G06F1/04

摘要： Circuits and methods for providing a pulsed clock signal for use with pulsed latch circuits are described. A variable pulse generator is coupled to form a pulsed clock output responsive to a control signal and a clock input signal. A feedback loop is provided with a pulse monitor and a pulse control circuit. Samples of the pulsed clock signal are taken by the pulse monitor and an output is formed in the form of a pattern. The pulse control circuit receives the output of the monitor and determines whether it matches a predetermined pattern. Adjustments are made to the control signal to adaptively adjust the pulsed clock signal. The feedback loop may operate continuously. In alternative embodiments the feedback loop may be powered down. Methods for adaptively controlling a pulsed clock signal are disclosed.

摘要翻译： 描述了提供用于脉冲锁存电路的脉冲时钟信号的电路和方法。 可变脉冲发生器耦合以响应于控制信号和时钟输入信号形成脉冲时钟输出。 反馈回路具有脉冲监视器和脉冲控制电路。 脉冲时钟信号的采样由脉冲监视器拍摄，并且以图案的形式形成输出。 脉冲控制电路接收监视器的输出并确定其是否匹配预定模式。 调整控制信号以自适应调整脉冲时钟信号。 反馈回路可以连续工作。 在替代实施例中，反馈回路可以断电。 公开了用于自适应地控制脉冲时钟信号的方法。

公开(公告)号：US07833848B2

公开(公告)日：2010-11-16

申请号：US11864415

申请日：2007-09-28

申请人： Hung Chih Tsai ,  Chih Chieh Chen ,  Sheng Chen Chung ,  Kong Beng Thei ,  Harry Chuang

发明人： Hung Chih Tsai ,  Chih Chieh Chen ,  Sheng Chen Chung ,  Kong Beng Thei ,  Harry Chuang

IPC分类号： H01L21/339 ,  H01L21/00 ,  H01L21/8238

CPC分类号： H01L21/82385 ,  H01L21/31144 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： A method for removing hard masks on gates in a semiconductor manufacturing process is conducted as follows. First of all, a first gate and a second gate with hard masks are formed on a semiconductor substrate, wherein the second gate is larger than the first gate. The first gate and second gate could be associated with silicon-germanium (SiGe) source and drain regions to form p-type transistors. Next, a photoresist layer is deposited, and an opening of the photoresist layer is formed on the hard mask of the second gate. Then, the photoresist layer on the first and second gates is removed completely by etching back. Because there is no photoresist residue, the hard masks on the first and second gates can be removed completely afterwards.

摘要翻译： 如下进行半导体制造工序中的门上去除硬掩模的方法。 首先，在半导体衬底上形成具有硬掩模的第一栅极和第二栅极，其中第二栅极大于第一栅极。 第一栅极和第二栅极可以与硅 - 锗（SiGe）源极和漏极区域相关联以形成p型晶体管。 接下来，沉积光致抗蚀剂层，并且在第二栅极的硬掩模上形成光致抗蚀剂层的开口。 然后，通过蚀刻完全去除第一和第二栅极上的光致抗蚀剂层。 因为没有光致抗蚀剂残留物，所以第一和第二栅极上的硬掩模可以被完全去除。