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公开(公告)号：US07567883B2
公开(公告)日：2009-07-28
申请号：US11762208
申请日：2007-06-13
IPC分类号： G01R31/00
CPC分类号： G01R31/31708 , G01R31/31725
摘要： The preferred embodiments of the present invention provide approaches for synchronizing signals in a testing system. In some embodiments, the timing signal associated with each device under test (DUT) is maintained at an integer multiple of the tester timing signal. Additionally, in other embodiments, the timing signal associated with various DUTs is used as a timing reference for other devices.
摘要翻译： 本发明的优选实施例提供了用于在测试系统中同步信号的方法。 在一些实施例中，与被测设备（DUT）相关联的定时信号保持在测试器定时信号的整数倍。 此外，在其他实施例中，与各种DUT相关联的定时信号用作其它设备的定时参考。
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公开(公告)号：US6052028A
公开(公告)日：2000-04-18
申请号：US163788
申请日：1998-09-30
申请人： Dale A. Heaton
发明人： Dale A. Heaton
CPC分类号： H03F3/3076
摘要： The bandwidth of a bipolar complementary emitter follower unity gain buffer is proportionally dependent upon the idle current of the input stage (Q1, Q2) that drives the base nodes of the NPN (Q3) and PNP (Q4) emitter follower output transistors. A high bandwidth typically requires a high idle current. The bandwidth and slew rate of a unity gain buffer are improved without increasing the idle circuit by adding a circuit (Q9-Q12)to sense when a transient is occurring and increasing the positive or negative bias current only during the positive or negative transient. Shunt diodes (Q5, Q6) (base-emitter junctions) can be added across the input transistor emitters to shunt some of the input stage idle current into the opposing current source. This will reduce the idle current at the output stage and reduce the power dissipation of the input stage without sacrificing the available current to drive the base nodes of the output transistors.
摘要翻译： 双极互补射极跟随器单位增益缓冲器的带宽成比例地依赖于驱动NPN（Q3）和PNP（Q4）射极跟随器输出晶体管的基极节点的输入级（Q1，Q2）的空闲电流。 高带宽通常需要高空闲电流。 改善单位增益缓冲器的带宽和转换速率，而不会通过增加电路（Q9-Q12）来检测何时发生瞬态而增加空闲电路，并且仅在正或负瞬变期间增加正或负偏置电流。 可以在输入晶体管发射极之间添加并联二极管（Q5，Q6）（基极 - 发射极结），以将一些输入级空闲电流分流到相对电流源中。 这将减少输出级的空闲电流，并降低输入级的功耗，而不牺牲可用电流驱动输出晶体管的基极节点。
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3.发明授权Parametric measurement unit/device power supply for semiconductor test system 失效半导体测试系统的参数测量单元/器件电源
公开(公告)号：US5059889A
公开(公告)日：1991-10-22
申请号：US490803
申请日：1990-03-08
申请人： Dale A. Heaton
发明人： Dale A. Heaton
CPC分类号： G01R31/3004 , G01R31/2601 , G05F1/575 , G01R31/31905
摘要： Disclosed is a device power supply in a semiconductor test system for supplying programmed test pattern voltages to a semiconductor device under test and for current range switching of current range resistors without effecting the output voltage of the device power supply.
摘要翻译： 公开了一种半导体测试系统中的器件电源，用于向被测半导体器件提供编程的测试图案电压以及电流范围电阻器的电流范围切换，而不影响器件电源的输出电压。
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公开(公告)号：US07437262B2
公开(公告)日：2008-10-14
申请号：US10643109
申请日：2003-08-18
CPC分类号： G06F11/273
摘要： A system for testing a device includes a processor that operates to execute instructions, where the instructions are used to test a device. The processor also operates to generate test signals associated with the test instructions. An interface apparatus is coupled to the processor and operates to communicate the test signals to the device. The interface apparatus includes connectors, where each connector operates to communicate at least one of the test signals.
摘要翻译： 用于测试设备的系统包括操作以执行指令的处理器，其中使用指令来测试设备。 该处理器还用于产生与测试指令相关联的测试信号。 接口设备耦合到处理器并且操作以将测试信号传送到设备。 接口设备包括连接器，其中每个连接器操作以通信至少一个测试信号。
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公开(公告)号：US07340219B2
公开(公告)日：2008-03-04
申请号：US10961887
申请日：2004-10-08
申请人： Dale A. Heaton , Lianrui Zhang , Craig Lambert
发明人： Dale A. Heaton , Lianrui Zhang , Craig Lambert
IPC分类号： H04B17/00
CPC分类号： H04W24/00
摘要： According to one embodiment of the invention, a system for testing electronic devices includes a first RF source operable to output a first signal, a second RF source operable to output a second signal, a combiner coupled to the first and second RF sources and operable to combine the first and second signals to create a third signal, one or more down converters operable to receive respective output signals from respective electronic devices and create respective down converted signals, and a set of switches operable to switch the second RF source to a local oscillator function that couples to the one or more down converters for inputting respective reference signals into the one or more down converters.
摘要翻译： 根据本发明的一个实施例，用于测试电子设备的系统包括可操作以输出第一信号的第一RF源，可操作以输出第二信号的第二RF源，耦合到第一和第二RF源的组合器， 组合第一和第二信号以产生第三信号，一个或多个下变频器可操作以从相应的电子设备接收相应的输出信号并产生相应的下变频信号;以及一组开关，其可操作以将第二RF源切换到本地振荡器 功能，其耦合到一个或多个下变频器，用于将相应的参考信号输入到一个或多个下变频器。
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公开(公告)号：US5103169A
公开(公告)日：1992-04-07
申请号：US436844
申请日：1989-11-15
申请人： Dale A. Heaton , James E. Bartling
发明人： Dale A. Heaton , James E. Bartling
IPC分类号： G01R31/28 , G01R31/319
CPC分类号： G01R31/31924
摘要： Field Effect Transistors are used to replace mechanical relays and to minimize the distance a Device Under Test (DUT) must drive a signal path to the receiver, to minimize insertion losses in critical paths to the DUT, and generally increase reliability in integrated test systems by eliminating the need for relays to test integrated circuits.
摘要翻译： 场效应晶体管用于替代机械继电器，并最大限度地减少被测器件（DUT）必须驱动到接收器的信号路径的距离，以最大程度地降低到DUT的关键路径中的插入损耗，并通常提高集成测试系统的可靠性 无需继电器来测试集成电路。
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公开(公告)号：US08000921B2
公开(公告)日：2011-08-16
申请号：US12490084
申请日：2009-06-23
IPC分类号： G01R31/00
CPC分类号： G01R31/31708 , G01R31/31725
摘要： The preferred embodiments of the present invention provide approaches for synchronizing signals in a testing system. In some embodiments, the timing signal associated with each device under test (DUT) is maintained at an integer multiple of the tester timing signal. Additionally, in other embodiments, the timing signal associated with various DUTs is used as a timing reference for other devices.
摘要翻译： 本发明的优选实施例提供了用于在测试系统中同步信号的方法。 在一些实施例中，与被测设备（DUT）相关联的定时信号保持在测试器定时信号的整数倍。 此外，在其他实施例中，与各种DUT相关联的定时信号用作其它设备的定时参考。
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公开(公告)号：US5973561A
公开(公告)日：1999-10-26
申请号：US88625
申请日：1998-06-01
申请人： Dale A. Heaton
发明人： Dale A. Heaton
CPC分类号： H03K5/2418 , H03F1/48 , H03F3/45085 , H03F2203/45496 , H03F2203/45636 , H03F2203/45648 , H03F2203/45696 , H03F2203/45702
摘要： The frequency response of a differential amplifier or comparator is improved by adding a positive and negative clamp at the collector (drain in the case of an MOS embodiment) outputs of the differential transistor pair that will clamp the output voltage swing to less than one RC time constant. The frequency response (rise time t.sub.r) is improved from t.sub.r =2.2.times.RC to t.sub.r
摘要翻译： 差分放大器或比较器的频率响应通过在集电极（在MOS实施例的情况下的漏极）中添加正和负钳位来提高，差分晶体管对的输出将将输出电压摆幅钳位到小于一个RC时间 不变。 频率响应（上升时间tr）从tr = 2.2xRC提高到tr << 1xRC。 可以增加差分输出电阻以改善差分增益，同时保持tr << 1xRC的上升时间的改善。
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公开(公告)号：US5065043A
公开(公告)日：1991-11-12
申请号：US491752
申请日：1990-03-09
申请人： James E. Bartling , Dale A. Heaton
发明人： James E. Bartling , Dale A. Heaton
CPC分类号： H03F3/45385 , G05F3/24 , H03F1/226
摘要： Hysteresis effects in low frequency field effect transistor circuits are minimized by using biasing or clamping circuits including field effect transistors.
摘要翻译： 通过使用包括场效应晶体管的偏置或钳位电路，使低频场效应晶体管电路中的滞后效应最小化。
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公开(公告)号：US07177772B2
公开(公告)日：2007-02-13
申请号：US10853467
申请日：2004-05-25
申请人： Henry P. Largey , Dale A. Heaton , Lianrui Zang
发明人： Henry P. Largey , Dale A. Heaton , Lianrui Zang
IPC分类号： G01R25/00
CPC分类号： H04B17/345
摘要： A method for measuring noise parameters includes generating a noise signal at a noise source. The noise signal includes a first input signal at a first frequency and a second input signal at a second frequency. The first input signal and the second input signal are modulated onto a carrier to generate a modulated signal. The modulated signal is attenuated to a desired power level and applied to a device under test to obtain a noise measurement.
摘要翻译： 用于测量噪声参数的方法包括在噪声源处产生噪声信号。 噪声信号包括第一频率的第一输入信号和第二频率的第二输入信号。 第一输入信号和第二输入信号被调制到载波上以产生调制信号。 调制信号被衰减到期望的功率电平并且被施加到被测器件以获得噪声测量。
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