公开(公告)号：US09911743B2

公开(公告)日：2018-03-06

申请号：US11835852

申请日：2007-08-08

申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

IPC分类号： H01L27/102 ,  B82Y10/00 ,  G11C13/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/12

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/19 ,  G11C2213/71 ,  G11C2213/72 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1203

摘要： Under one aspect, a method of making a nanotube switch includes: providing a substrate having a first conductive terminal; depositing a multilayer nanotube fabric over the first conductive terminal; and depositing a second conductive terminal over the multilayer nanotube fabric, the nanotube fabric having a thickness, density, and composition selected to prevent direct physical and electrical contact between the first and second conductive terminals. In some embodiments, the first and second conductive terminals and the multilayer nanotube fabric are lithographically patterned so as to each have substantially the same lateral dimensions, e.g., to each have a substantially circular or rectangular lateral shape. In some embodiments, the multilayer nanotube fabric has a thickness from 10 nm to 200 nm, e.g., 10 nm to 50 nm. The structure may include an addressable diode provided under the first conductive terminal or deposited over the second terminal.

公开(公告)号：US20110176359A1

公开(公告)日：2011-07-21

申请号：US12934545

申请日：2009-03-25

申请人： Claude L. Bertin ,  Brent M. Segal ,  Darren K. Brock

发明人： Claude L. Bertin ,  Brent M. Segal ,  Darren K. Brock

IPC分类号： G11C11/54 ,  B82Y30/00

CPC分类号： G06N3/063

摘要： Physical neural networks based nanotechnology include dendrite circuits that comprise non-volatile nanotube switches. A first terminal of the non-volatile nanotube switches is able to receive an electrical signal and a second terminal of the non-volatile nanotube switches is coupled to a common node that sums any electrical signals at the first terminals of the nanotube switches. The neural networks further includes transfer circuits to propagate the electrical signal, synapse circuits, and axon circuits.

摘要翻译： 基于物理神经网络的纳米技术包括包含非挥发性纳米管开关的枝晶电路。 非挥发性纳米管开关的第一端子能够接收电信号，并且非易失性纳米管开关的第二端子耦合到公共节点，该公共节点与纳米管开关的第一端子处的任何电信号相加。 神经网络还包括传输电路以传播电信号，突触电路和轴突电路。

公开(公告)号：US20090283803A1

公开(公告)日：2009-11-19

申请号：US12415247

申请日：2009-03-31

申请人： Brent M. Segal ,  Darren K. Brock ,  Thomas Rueckes

发明人： Brent M. Segal ,  Darren K. Brock ,  Thomas Rueckes

IPC分类号： H01L27/08 ,  H01L21/82

CPC分类号： G11C23/00 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/16 ,  G11C2213/81 ,  H01H1/0094 ,  H01L21/76838 ,  H01L27/10 ,  Y10S977/724 ,  Y10S977/742 ,  Y10S977/796 ,  Y10S977/856 ,  Y10S977/888 ,  Y10S977/943 ,  Y10T428/24893 ,  Y10T428/24917

摘要： Electromechanical circuits, such as memory cells, and methods for making same are disclosed. The circuits include a structure having electrically conductive traces and supports extending from a surface of the substrate, and nanotube ribbons suspended by the supports that cross the electrically conductive traces, wherein each ribbon comprises one or more nanotubes. The electro-mechanical circuit elements are made by providing a structure having electrically conductive traces and supports, in which the supports extend from a surface of the substrate. A layer of nanotubes is provided over the supports, and portions of the layer of nanotubes are selectively removed to form ribbons of nanotubes that cross the electrically conductive traces. Each ribbon includes one or more nanotubes.

摘要翻译： 公开了诸如存储单元的机电电路及其制造方法。 这些电路包括具有导电迹线和从衬底表面延伸的支撑体的结构，以及由支撑体悬挂的穿过导电迹线的纳米管带，其中每个带包括一个或多个纳米管。 电 - 机械电路元件通过提供具有导电迹线和支撑件的结构来制造，其中支撑件从基板的表面延伸。 在载体上提供一层纳米管，并且选择性地去除纳米管层的部分以形成穿过导电迹线的纳米管带。 每个带包括一个或多个纳米管。

公开(公告)号：US07294877B2

公开(公告)日：2007-11-13

申请号：US10811373

申请日：2004-03-26

申请人： Thomas Rueckes ,  Brent M. Segal ,  Bernard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

发明人： Thomas Rueckes ,  Brent M. Segal ,  Bernard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

IPC分类号： H01L51/30

CPC分类号： H01L51/055 ,  B82Y10/00 ,  G11C13/025 ,  G11C16/0416 ,  G11C23/00 ,  G11C2213/17 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/42324 ,  H01L51/0048 ,  H01L51/0052

摘要： Nanotube on gate FET structures and applications of such, including n2 crossbars requiring only 2n control lines. A non-volatile transistor device includes a source region and a drain region of a first semiconductor type of material and a channel region of a second semiconductor type of material disposed between the source and drain region. A gate structure is made of at least one of semiconductive or conductive material and is disposed over an insulator over the channel region. A control gate is made of at least one of semiconductive or conductive material. An electromechanically-deflectable nanotube switching element is in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region. Certain embodiments of the device have an area of about 4 F2. Other embodiments include a release line is positioned in spaced relation to the nanotube switching element, and having a horizontal orientation that is parallel to the orientation of the source and drain diffusions. Other embodiments provide an n2 crossbar array having n2 non-volatile transistor devices, but require only 2n control lines.

摘要翻译： 纳米管栅极FET结构及其应用，包括只需要2n条控制线的n 2条交叉。 非挥发性晶体管器件包括第一半导体类型的材料的源极区域和漏极区域以及设置在源极和漏极区域之间的第二半导体类型的材料的沟道区域。 栅极结构由半导体或导电材料中的至少一种制成，并且设置在沟道区域上方的绝缘体上。 控制门由半导体或导电材料中的至少一种制成。 机电偏转型纳米管开关元件与栅极结构和控制栅极结构中的一个固定接触，并且不与栅极结构和控制栅极结构中的另一个固定接触。 该器件具有固有电容的网络，包括相对于栅极结构的未折射的纳米管开关元件的固有电容。 网络使得纳米管开关元件响应于施加到控制栅极和源极区域和漏极区域之一的信号而偏转成与栅极结构和控制栅极结构中的另一个接触。 该装置的某些实施例具有约4F 2的面积。 其他实施例包括释放线与纳米管开关元件间隔开定位，并且具有平行于源极和漏极扩散的取向的水平取向。 其他实施例提供了具有n 2个非易失性晶体管器件的n≥2的交叉开关阵列，但是仅需要2n个控制线。

公开(公告)号：US06944054B2

公开(公告)日：2005-09-13

申请号：US10810962

申请日：2004-03-26

申请人： Thomas Rueckes ,  Brent M. Segal ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

发明人： Thomas Rueckes ,  Brent M. Segal ,  Bernhard Vogeli ,  Darren K. Brock ,  Venkatachalam C. Jaiprakash ,  Claude L. Bertin

IPC分类号： G11C13/02 ,  G11C23/00 ,  G11C11/34

CPC分类号： G11C23/00 ,  B82Y10/00 ,  G11C13/025 ,  Y10S977/943

摘要： A non-volatile memory array includes a plurality of memory cells, each cell receiving a bit line, word line, and release line. Each memory cell includes a cell selection transistor and a restore transistor with first, second and third nodes. Each cell further includes an electromechanically deflectable switch, the position of which manifests the logical state of the cell. Each cell is bit selectable for read and write operations.

摘要翻译： 非易失性存储器阵列包括多个存储器单元，每个单元接收位线，字线和释放线。 每个存储单元包括单元选择晶体管和具有第一，第二和第三节点的恢复晶体管。 每个单元还包括机电偏转开关，其位置表示单元的逻辑状态。 每个单元都可以进行读和写操作。

公开(公告)号：US08513768B2

公开(公告)日：2013-08-20

申请号：US11835651

申请日：2007-08-08

申请人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

发明人： Claude L. Bertin ,  Thomas Rueckes ,  X. M. Henry Huang ,  Ramesh Sivarajan ,  Eliodor G. Ghenciu ,  Steven L. Konsek ,  Mitchell Meinhold ,  Jonathan W. Ward ,  Darren K. Brock

IPC分类号： H01L23/52

CPC分类号： H01L27/1021 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/19 ,  H01L21/8221 ,  H01L23/5256 ,  H01L27/0688 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： Under one aspect, a non-volatile nanotube diode device includes first and second terminals; a semiconductor element including a cathode and an anode, and capable of forming a conductive pathway between the cathode and anode in response to electrical stimulus applied to the first conductive terminal; and a nanotube switching element including a nanotube fabric article in electrical communication with the semiconductive element, the nanotube fabric article disposed between and capable of forming a conductive pathway between the semiconductor element and the second terminal, wherein electrical stimuli on the first and second terminals causes a plurality of logic states.

摘要翻译： 在一个方面，非挥发性纳米管二极管器件包括第一和第二端子; 包括阴极和阳极的半导体元件，并且能够响应于施加到第一导电端子的电刺激而在阴极和阳极之间形成导电路径; 以及纳米管开关元件，其包括与所述半导体元件电连通的纳米管织物制品，所述纳米管织物制品设置在所述半导体元件和所述第二端子之间，并且能够形成所述第一和第二端子之间的电刺激， 多个逻辑状态。

公开(公告)号：US08101976B2

公开(公告)日：2012-01-24

申请号：US11853550

申请日：2007-09-11

申请人： Brent M. Segal ,  Darren K. Brock ,  Thomas Rueckes

发明人： Brent M. Segal ,  Darren K. Brock ,  Thomas Rueckes

IPC分类号： H01L23/52 ,  G11C11/00 ,  G11C7/00 ,  H01L27/10

CPC分类号： G11C23/00 ,  B82Y10/00 ,  G11C13/025 ,  G11C2213/77 ,  G11C2213/81 ,  H01H1/0094 ,  H01L27/10 ,  H01L27/1203 ,  Y10S977/734 ,  Y10S977/742 ,  Y10S977/765 ,  Y10S977/943

摘要： A memory system having electromechanical memory cells and decoders is disclosed. A decoder circuit selects at least one of the memory cells of an array of such cells. Each cell in the array is a crossbar junction at least one element of which is a nanotube or a nanotube ribbon. The decoder circuit is constructed of crossbar junctions at least one element of each junction being a nanotube or a nanotube ribbon.

摘要翻译： 公开了一种具有机电存储器单元和解码器的存储器系统。 解码器电路选择这种单元阵列的至少一个存储单元。 阵列中的每个单元是其中的至少一个元素是纳米管或纳米管带的交叉连接。 解码器电路由交叉连接点构成，每个结点的至少一个元件是纳米管或纳米管带。

公开(公告)号：US07915066B2

公开(公告)日：2011-03-29

申请号：US12202737

申请日：2008-09-02

申请人： Thomas Rueckes ,  Brent M. Segal ,  Darren K. Brock

发明人： Thomas Rueckes ,  Brent M. Segal ,  Darren K. Brock

IPC分类号： H01L21/00

CPC分类号： H01L21/76838 ,  B81C1/00142 ,  B81C2201/019 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/81 ,  H01H1/0094 ,  Y10S977/734

摘要： Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an upper surface of the lower structure so as to contact the lower support structures. An upper structure is provided over the nanotube ribbon. The upper structure includes upper support structures and an upper electrically conductive element. In some arrangements, the upper and lower electrically conductive elements are in vertical alignment, but in some arrangements they are not.

摘要翻译： 描述制造机电电路元件的方法。 提供具有较低支撑结构和较低导电元件的下部结构。 纳米管带（或其他机电响应元件）形成在下结构的上表面上以便接触下支撑结构。 在纳米管带上提供上部结构。 上部结构包括上部支撑结构和上部导电元件。 在一些布置中，上和下导电元件是垂直对准的，但在某些布置中它们不是。

公开(公告)号：US20100283528A1

公开(公告)日：2010-11-11

申请号：US11939316

申请日：2007-11-13

申请人： Thomas RUECKES ,  Brent M. SEGAL ,  Bernard VOGELI ,  Darren K. BROCK ,  Venkatachalam C. JAIPRAKASH ,  Claude L. BERTIN

发明人： Thomas RUECKES ,  Brent M. SEGAL ,  Bernard VOGELI ,  Darren K. BROCK ,  Venkatachalam C. JAIPRAKASH ,  Claude L. BERTIN

IPC分类号： H03K17/687

CPC分类号： G11C13/025 ,  B82Y10/00 ,  G11C23/00 ,  G11C2213/17 ,  H01L27/112 ,  H01L27/11233 ,  H01L27/115 ,  H01L27/11521 ,  H01L51/0048 ,  H01L51/0052

摘要： Under one aspect, non-volatile transistor device includes a source and drain with a channel in between; a gate structure made of a semiconductive or conductive material disposed over an insulator over the channel; a control gate made of a semiconductive or conductive material; and an electromechanically-deflectable nanotube switching element in fixed contact with one of the gate structure and the control gate structure and is not in fixed contact with the other of the gate structure and the control gate structure. The device has a network of inherent capacitances, including an inherent capacitance of an undeflected nanotube switching element in relation to the gate structure. The network is such that the nanotube switching element is deflectable into contact with the other of the gate structure and the control gate structure in response to signals being applied to the control gate and one of the source region and drain region.

摘要翻译： 在一个方面，非易失性晶体管器件包括源极和漏极之间的沟道; 由半导体或导电材料制成的栅极结构，设置在通道上方的绝缘体上; 由半导体或导电材料制成的控制门; 以及与栅极结构和控制栅极结构中的一个固定接触并且不与栅极结构和控制栅极结构中的另一个固定接触的机电偏转的纳米管开关元件。 该器件具有固有电容的网络，包括相对于栅极结构的未折射的纳米管开关元件的固有电容。 网络使得纳米管开关元件响应于施加到控制栅极和源极区域和漏极区域之一的信号而偏转成与栅极结构和控制栅极结构中的另一个接触。

公开(公告)号：US20090053846A1

公开(公告)日：2009-02-26

申请号：US12202737

申请日：2008-09-02

申请人： Thomas RUECKES ,  Brent M. SEGAL ,  Darren K. BROCK

发明人： Thomas RUECKES ,  Brent M. SEGAL ,  Darren K. BROCK

IPC分类号： H01L21/44

CPC分类号： H01L21/76838 ,  B81C1/00142 ,  B81C2201/019 ,  B82Y10/00 ,  G11C13/025 ,  G11C23/00 ,  G11C2213/16 ,  G11C2213/81 ,  H01H1/0094 ,  Y10S977/734

摘要： Methods of producing an electromechanical circuit element are described. A lower structure having lower support structures and a lower electrically conductive element is provided. A nanotube ribbon (or other electromechanically responsive element) is formed on an upper surface of the lower structure so as to contact the lower support structures. An upper structure is provided over the nanotube ribbon. The upper structure includes upper support structures and an upper electrically conductive element. In some arrangements, the upper and lower electrically conductive elements are in vertical alignment, but in some arrangements they are not.

摘要翻译： 描述制造机电电路元件的方法。 提供具有较低支撑结构和较低导电元件的下部结构。 纳米管带（或其他机电响应元件）形成在下结构的上表面上以便接触下支撑结构。 在纳米管带上提供上部结构。 上部结构包括上部支撑结构和上部导电元件。 在一些布置中，上和下导电元件是垂直对准的，但在某些布置中它们不是。