摘要:
A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
摘要:
A scanning heat flow probe for making quantitative measurements of heat flow through a device under test is provided. In one embodiment the scanning heat flow probe includes an electric current conductor in a cantilever beam connected to a probe tip and coupled to two voltmeter leads. The probe also includes two thermocouple junctions in the cantilever beam electrically isolated from the electric current conductor and the two voltmeter leads. Heat flow is derived quantitatively using only voltage and current measurements. In other forms, the invention relates to the calibration of scanning heat flow probes through a method involving interconnected probes, and relates to the minimization of heat flow measurement uncertainty by probe structure design practices.
摘要:
A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
摘要:
A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
摘要:
A method and system for forming a thermoelement for a thermoelectric cooler is provided. In one embodiment a substrate having a plurality of pointed tips covered by a metallic layer is formed. Portions of the metallic layer are covered by an insulator and other portions of the metallic layer are exposed. Next, a patterned layer of thermoelectric material is formed by depositions extending from the exposed portions of the metallic layer in the presence of a deposition mask. Finally, a metallic layer is formed to selectively contact the patterned layer of thermoelectric material.
摘要:
A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1−yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly selective etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1−yGey, and strained Si1−yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1−yGeyC or a heavily doped layer to make electrical contacts for the SiGe/Si heterojunction diodes.
摘要翻译:描述了在松散的SiGe绝缘体上(SGOI)上形成应变Si或SiGe的方法或Si异质结构上的SiGe的方法,该方法包括生长外延Si 1-y Ge层 半导体衬底,通过化学机械抛光的平滑表面,通过热处理将两个衬底结合在一起,并且通过使用SiGe本身作为蚀刻停止层的高选择性蚀刻将SiGe层从一个衬底转移到另一衬底。 转移的SiGe层可以通过CMP平滑其上表面,用于外延沉积弛豫的Si 1-y Ge y Si,并且应变Si 1-y SUB 取决于组成,应变Si,应变SiC,应变Ge,应变GeC和应变Si 1-y C y C y C或 一个重掺杂层,用于形成SiGe / Si异质结二极管的电接点。
摘要:
A method for forming strained Si or SiGe on relaxed SiGe on insulator (SGOI) or a SiGe on Si heterostructure is described incorporating growing epitaxial Si1-yGey layers on a semiconductor substrate, smoothing surfaces by Chemo-Mechanical Polishing, bonding two substrates together via thermal treatments and transferring the SiGe layer from one substrate to the other via highly seletive etching using SiGe itself as the etch-stop. The transferred SiGe layer may have its upper surface smoothed by CMP for epitaxial deposition of relaxed Si1-yGey, and strained Si1-yGey depending upon composition, strained Si, strained SiC, strained Ge, strained GeC, and strained Si1-yGeyC or a heavily doped layer to make electrical contacts of the SiGe/Si heterojunction diodes.
摘要翻译:描述了在松散的SiGe绝缘体上(SGOI)上形成应变Si或SiGe的方法或Si异质结构上的SiGe的方法,该方法包括生长外延Si 1-y Ge层 半导体衬底,通过化学机械抛光的平滑表面,通过热处理将两个衬底粘合在一起,并通过使用SiGe本身作为蚀刻停止层的高精密蚀刻将SiGe层从一个衬底转移到另一衬底。 转移的SiGe层可以通过CMP平滑其上表面,用于外延沉积弛豫的Si 1-y Ge y Si,并且应变Si 1-y SUB 取决于组成,应变Si,应变SiC,应变Ge,应变GeC和应变Si 1-y C y C y C或 重掺杂层以形成SiGe / Si异质结二极管的电接触。
摘要:
A scanning heat flow probe for making quantitative measurements of heat flow through a device under test is provided. In one embodiment the scanning heat flow probe includes an electric current conductor in a cantilever beam connected to a probe tip and coupled to two voltmeter leads. The probe also includes two thermocouple junctions in the cantilever beam electrically isolated from the electric current conductor and the two voltmeter leads. Heat flow is derived quantitatively using only voltage and current measurements. In other forms, the invention relates to the calibration of scanning heat flow probes through a method involving interconnected probes, and relates to the minimization of heat flow measurement uncertainty by probe structure design practices.
摘要:
A scanning heat flow probe for making quantitative measurements of heat flow through a device under test is provided. In one embodiment the scanning heat flow probe includes an electric current conductor in a cantilever beam connected to a probe tip and coupled to two voltmeter leads. The probe also includes two thermocouple junctions in the cantilever beam electrically isolated from the electric current conductor and the two voltmeter leads. Heat flow is derived quantitatively using only voltage and current measurements. In other forms, the invention relates to the calibration of scanning heat flow probes through a method involving interconnected probes, and relates to the minimization of heat flow measurement uncertainty by probe structure design practices.
摘要:
A method of fabricating a scanning heat flow probe for making quantitative measurements of heat flow through a device under test is provided. In one embodiment the scanning heat flow probe includes an electric current conductor in a cantilever beam connected to a probe tip and coupled to two voltmeter leads. The probe also includes two thermocouple junctions in the cantilever beam electrically isolated from the electric current conductor and the two voltmeter leads. Heat flow is derived quantitatively using only voltage and current measurements. The invention also relates to the calibration of scanning heat flow probes through a method involving interconnected probes, and relates to the minimization of heat flow measurement uncertainty by probe structure design practices.