Process for the synthesis of highly pure cationic surfactant products

    公开(公告)号:US10287242B2

    公开(公告)日:2019-05-14

    申请号:US14369410

    申请日:2012-05-04

    IPC分类号: C07C229/00 C07C277/08

    摘要: The present invention is related to synthesis of highly pure cationic surfactant products by eliminating or reducing impurities generation that has beset prior art. This is achieved through the N-acylation of ester of amino acid and its inorganic salts or its organic salts (e.g. amino acid or hydrochloride of amino acid or sulfate of amino acid or acetate of amino acid etc.) in non-hydrolytic or nearly non-hydrolytic reaction conditions involving mono or biphasic reaction system with fatty acid halide (C4 to C20), under moderate uniform basic condition yielding high purity N-acyl substituted amino acid ester, particularly ethyl lauroyl arginate. The present process achieves pH control through process strategy rather than the measurement and control steps. This ambient temperature process is stable through a range of temperature variation eliminating rigid low temperature control.

    METHOD AND APPARATUS FOR AN INTELLIGENT LIGHT EMITTING DIODE DRIVER HAVING POWER FACTOR CORRECTION CAPABILITY
    5.
    发明申请
    METHOD AND APPARATUS FOR AN INTELLIGENT LIGHT EMITTING DIODE DRIVER HAVING POWER FACTOR CORRECTION CAPABILITY 有权
    具有功率因数校正能力的智能发光二极管驱动器的方法和装置

    公开(公告)号:US20100237786A1

    公开(公告)日:2010-09-23

    申请号:US12649057

    申请日:2009-12-29

    IPC分类号: H05B37/02

    摘要: The present invention relates to circuits and methods for controlling one or more LED strings. The circuit comprises a programmable controller coupled to one or more detectors, wherein the one or more detectors are configured to detect one or more measurable parameters of one or more LEDs or LED drivers. The controller is configured to receive information from the one or more detectors related to the one or more measurable parameters and use that information to determine the desired drive voltage for the LED strings. The controller is associated with a power supply having power factor correction (PFC) capability. The controller provides the power supply with a control signal indicative of the desired drive voltage for one or more LED strings. The power supply also receives ac voltage and current waveforms as inputs and performs power factor correction and rectified waveforms related to the ac waveforms. The power supply generates the desired drive voltage based on the control signal.

    摘要翻译: 本发明涉及用于控制一个或多个LED串的电路和方法。 电路包括耦合到一个或多个检测器的可编程控制器,其中所述一个或多个检测器被配置为检测一个或多个LED或LED驱动器的一个或多个可测量的参数。 控制器被配置为从与一个或多个可测量参数相关的一个或多个检测器接收信息,并使用该信息来确定LED串所需的驱动电压。 控制器与具有功率因数校正(PFC)能力的电源相关联。 控制器为电源提供指示一个或多个LED串的期望驱动电压的控制信号。 电源还接收交流电压和电流波形作为输入,并进行与交流波形相关的功率因数校正和整流波形。 电源根据控制信号产生所需的驱动电压。

    Method and circuit for an efficient and scalable constant current source for an electronic display
    6.
    发明授权
    Method and circuit for an efficient and scalable constant current source for an electronic display 有权
    用于电子显示器的高效且可扩展的恒流源的方法和电路

    公开(公告)号:US07598800B2

    公开(公告)日:2009-10-06

    申请号:US11805523

    申请日:2007-05-22

    IPC分类号: G05F1/10

    CPC分类号: G05F3/205

    摘要: The present invention uses two transistors instead of a sensing resistor to provide a constant current source for a load such as an array of light emitting diodes (“LEDs”). In the present invention, a bias current is applied to a branch of the circuit. The drain-to-source voltages of two transistors are matched. The voltage at the gate of both transistors is controlled based on the bias current and the drain-to-source current of the first of the two transistors. The second of the two transistors is sized such that source current of the second transistor is a multiple of the source current of the first transistor for a given gate voltage. By the techniques of this invention, the load current in a circuit is efficiently kept constant at a multiple of the input bias current.

    摘要翻译: 本发明使用两个晶体管代替感测电阻器来为诸如发光二极管阵列(“LED”)的负载提供恒定电流源。 在本发明中,偏置电流被施加到电路的支路。 两个晶体管的漏极 - 源极电压匹配。 基于两个晶体管中的第一个的偏置电流和漏极 - 源极电流来控制两个晶体管的栅极处的电压。 两个晶体管中的第二个的尺寸使得第二晶体管的源电流对于给定的栅极电压是第一晶体管的源极电流的倍数。 通过本发明的技术,电路中的负载电流被有效地保持恒定在输入偏置电流的倍数。

    Dynamic allocation of network resources in a multiple-user communication system
    7.
    发明授权
    Dynamic allocation of network resources in a multiple-user communication system 失效
    在多用户通信系统中动态分配网络资源

    公开(公告)号:US07366134B2

    公开(公告)日:2008-04-29

    申请号:US10362560

    申请日:2001-08-17

    IPC分类号: H04Q7/00

    摘要: In a multiple-user network communication system such as a satellite-based system, or in cable or wireless systems, the system resources, such as bandwidth, code allocation, and or slot timing, are allocated to users based in part on their class of service. The allocation provides for immediate allocation of the requested resources to a user having a verified high class of service so long as the resources are abatable or can be made available by tapping a resource reserve. If only a portion of the requested resources are available, they are made available immediately. From time to time, the resources available to at least one class of service are allocated among the users of that class of service, either equally, equally up to the requested resources, equitably, or in some systematic manner.

    摘要翻译: 在诸如基于卫星的系统或有线或无线系统的多用户网络通信系统中,诸如带宽,代码分配和时隙定时等系统资源被分配给用户,部分基于它们的类别 服务。 只要资源可靠,或者可以通过点击资源储备,该分配就可以将所请求的资源立即分配给具有经过验证的高等级服务的用户。 如果只有一部分所请求的资源可用,则它们将立即可用。 可以不时地将可用于至少一类服务的资源分配给该等级的服务的用户,平等地等同于所请求的资源,公平地或以某种系统的方式。

    Technique for improving asynchronous transfer mode operation over a
communications link with bursty bit errors
    8.
    发明授权
    Technique for improving asynchronous transfer mode operation over a communications link with bursty bit errors 失效
    通过具有突发位错误的通信链路改进异步传输模式操作的技术

    公开(公告)号:US5600653A

    公开(公告)日:1997-02-04

    申请号:US315485

    申请日:1994-09-30

    IPC分类号: H04L1/00 H04L12/56 H04Q11/04

    摘要: In an asynchronous transfer mode (ATM) system, interleaved cells are formed at the transmit end by combining into each interleaved cell certain bits from each of plural different original ATM cells, the interleaved cells are transmitted over the communications link, and then deinterleaved at the receive end. Any bursty errors occurring on the communications link will, after deinterleaving, be spread out over multiple original ATM cells, maximizing the error correction for ATM cells and error detection for AAL capability and minimizing loss of data. The C1 byte in the Physical Layer Convergence Protocol (PLCP), which indicates the location of end of the PLCP frame, is protected against the burst errors by replication of C1 byte through inserting them in the growth bytes Z1 through Z4.

    摘要翻译: 在异步传输模式(ATM)系统中,在发送端通过将多个不同的原始ATM信元中的每一个组合成特定的比特,在发送端形成交织的小区,通过通信链路传送交织的小区,然后在 接收结束 通信链路上发生的任何突发性错误将在解交织之后分散在多个原始ATM信元上,最大化ATM信元的纠错和AAL能力的错误检测,并最大限度地减少数据丢失。 通过将C1字节插入到增长字节Z1到Z4中,通过复制C1字节来保护表示PLCP帧结束位置的物理层汇聚协议(PLCP)中的C1字节。

    Computer-based analysis of seller performance
    9.
    发明授权
    Computer-based analysis of seller performance 有权
    卖家业绩计算机分析

    公开(公告)号:US08510178B2

    公开(公告)日:2013-08-13

    申请号:US13491453

    申请日:2012-06-07

    IPC分类号: G06Q30/00

    摘要: A performance analysis system analyzes the performance of affiliate sites that provide links to specific items in an electronic catalog, and identifies catalog items that can be listed by such affiliate sites to improve performance. An association mining component analyzes transaction data attributable to specific categories of affiliate sites to identify items that are frequently purchased in combination by users of such sites. The detected item associations are used to evaluate, for a given affiliate site, whether significant disparities exist between the expected and actual sales quantities of specific items. The results of the analysis are incorporated into affiliate-specific performance reports, which may include specific recommendations for improving performance. The disclosed methods may also be used to analyze the performance of, and provide recommendations to, online sellers within a marketplace or auction system.

    摘要翻译: 性能分析系统分析提供电子目录中特定项目的链接的联属网站的性能,并识别可由此类联属网站列出的目录项以提高性能。 关联挖掘组件分析归属于特定类别的联属网站的交易数据,以识别这些站点的用户经常购买的项目。 检测到的项目关联用于对给定的联属网站评估特定项目的预期销售量和实际销售数量之间是否存在显着差异。 分析结果被并入关联企业的绩效报告,其中可能包括提高绩效的具体建议。 所公开的方法还可以用于分析市场或拍卖系统中的在线卖家的表现并向其提供建议。

    Apparatus, circuit and method for automatic phase-shifting pulse width modulated signal generation
    10.
    发明授权
    Apparatus, circuit and method for automatic phase-shifting pulse width modulated signal generation 有权
    用于自动移相脉宽调制信号生成的装置,电路及方法

    公开(公告)号:US08339174B2

    公开(公告)日:2012-12-25

    申请号:US12712930

    申请日:2010-02-25

    IPC分类号: H03K3/00

    摘要: Systems, circuits and methods for phase-shifting pulse width modulated signal generation are disclosed. In some embodiments, a phase-shifting pulse width modulation circuit is configured to output pulses based on an input pulse width modulated signal. The pulses are staggered relative to one another, and can be received by a light-emitting diode driver for driving a light-emitting diode string at one or more time periods. The phase-shifting pulse width modulation circuit can include a counter-based programmable delay subcircuit consisting of two counter-based programmable delay blocks.

    摘要翻译: 公开了用于相移脉宽调制信号产生的系统,电路和方法。 在一些实施例中,移相脉宽调制电路被配置为基于输入脉宽调制信号输出脉冲。 脉冲相对于彼此交错,并且可以由用于在一个或多个时间段驱动发光二极管串的发光二极管驱动器接收。 相移脉宽调制电路可以包括由两个基于计数器的可编程延迟块组成的基于计数器的可编程延迟子电路。