公开(公告)号：US06650709B2

公开(公告)日：2003-11-18

申请号：US09770246

申请日：2001-01-29

申请人： Takeshi Nakazawa ,  Eiji Tsuboi

发明人： Takeshi Nakazawa ,  Eiji Tsuboi

IPC分类号： H04N724

CPC分类号： H04N7/01 ,  H04N5/4401 ,  H04N5/46 ,  H04N21/42692 ,  H04N21/4305

摘要： A controller reads a header information, which is input from a picture information acquisition unit, stores the header information in a storage unit, and reads a frame rate code corresponding to picture data to be displayed from the storage unit according to displayed time information contained in the header information. Furthermore, the controller sets the dot clock frequency in response to the read frame frequency in a dot clock output unit, outputs a display control signal to an output unit in order to compare the currently set frame frequency and the frame frequency just prior to the currently set frame frequency. If both flags are not in agreement, then the controller outputs a display control signal to the output unit wherein the display control signal indicates a picture set by the frame rate which differs from the just prior frame rate, and commands the dot clock output unit to switch a dot clock.

公开(公告)号：US07865021B2

公开(公告)日：2011-01-04

申请号：US11287363

申请日：2005-11-28

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： G06K9/36 ,  G06K9/46 ,  H04N7/12 ,  H04N11/02

CPC分类号： H04N19/44 ,  H04N21/4305 ,  H04N21/4307 ,  H04N21/4347 ,  H04N21/44004

摘要： A compressed stream decoding apparatus to preventing a disturbance of a display image is disclosed. The compressed stream decoding apparatus includes: a first video data processor decoding an input first compressed video stream based on first reference time information added to the first compressed video stream, and outputting decoded video data based on the first reference time information; and a second video data processor performing alternatively a first processing and a second processing, wherein the first processing is decoding an input second compressed video stream based on second reference time information added to the second compressed video stream and outputting decoded video data based on the second reference time information; and the second processing is outputting the decoded video data decoded by the first video data processor based on the first reference time information.

摘要翻译： 公开了一种用于防止显示图像干扰的压缩流解码装置。 压缩流解码装置包括：第一视频数据处理器，基于添加到第一压缩视频流的第一参考时间信息对输入的第一压缩视频流进行解码，并且基于第一参考时间信息输出解码的视频数据; 以及第二视频数据处理器，交替地执行第一处理和第二处理，其中所述第一处理是基于添加到所述第二压缩视频流的第二参考时间信息来解码输入的第二压缩视频流，并且基于所述第二处理和第二处理输出解码的视频数据 参考时间信息; 并且第二处理是基于第一参考时间信息输出由第一视频数据处理器解码的解码视频数据。

公开(公告)号：US06912254B2

公开(公告)日：2005-06-28

申请号：US10067564

申请日：2002-02-05

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： H04N5/92 ,  H04N9/804 ,  H04N19/42 ,  H04N19/423 ,  H04N19/44 ,  H04N19/50 ,  H04N19/503 ,  H04N19/577 ,  H04N19/61 ,  H04N19/625 ,  H04N19/65 ,  H04N19/85 ,  H04N19/88 ,  H04N19/89 ,  H04B1/66 ,  H04N7/12

CPC分类号： H04N9/8042 ,  H04N19/423 ,  H04N19/61

摘要： An MPEG decoding system concurrently reproduces three pictures on a screen of a display unit on the basis of pieces of video data information representative of different kinds of pictures transferred through three data streams, and an MPEG video controller can select a frame memory from a set of frame memories assigned to any one of the data streams for storing the piece of video data information representative of any kind of picture so that the pictures are stable on the screen by virtue of elimination of a data read-out and a data write-in concurrently carried out on a frame memory in any frame period.

摘要翻译： MPEG解码系统基于代表通过三个数据流传送的不同种类的图像的视频数据信息同时在显示单元的屏幕上再现三个图像，并且MPEG视频控制器可以从一组 分配给任何一个数据流的帧存储器，用于存储表示任何种类的图像的视频数据信息，使得通过同时消除数据读出和数据写入，屏幕上的图像是稳定的 在任何帧周期内在帧存储器上执行。

公开(公告)号：US06600787B2

公开(公告)日：2003-07-29

申请号：US09761776

申请日：2001-01-18

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： H04N758

CPC分类号： H04N21/4343 ,  H04N21/4302

摘要： An MPEG decoding device is designed to decode multiple packetized elementary streams (PES) representing video signals and/or audio signals, which are bit streams compressed by the MPEG system in satellite digital broadcasting, for example. Herein, the multiple packetized elementary streams are stored in plural code buffers respectively. A selector selects one of the packetized elementary streams by a time division system, so that a PES decoder separates the selected packetized elementary stream to a PES header and an elementary stream. A time information holder holds time information being extracted from the PES header. An MPEG decoder decodes the elementary stream with reference to the time information. Namely, the MPEG decoder decodes pictures of the elementary stream in a decode order in connection with the time information, then, decoded pictures are rearranged and output in a display order. Because of provision of a single set of the PES decoder, time information holder and MPEG decoder with respect to processing of multiple packetized elementary streams, it is possible to reduce a circuit configuration of the MPEG decoding device in scale, and it is also possible to provide easy management on relationships between pictures and time information.

摘要翻译： MPEG解码装置被设计为对代表视频信号和/或音频信号的多个分组化基本流（PES）进行解码，这些视频信号和/或音频信号是卫星数字广播中由MPEG系统压缩的比特流。 这里，多个分组化的基本流分别存储在多个代码缓冲器中。 选择器通过时分系统选择分组化的基本流之一，使得PES解码器将所选择的分组化基本流分离成PES头部和基本流。 时间信息保持器保持从PES头提取的时间信息。 MPEG解码器参照时间信息解码基本流。 也就是说，MPEG解码器以与时间信息相关的解码顺序解码基本流的图像，然后解码的图像被重新布置并以显示顺序输出。 由于提供了一组PES解码器，时间信息保持器和MPEG解码器关于多个分组化基本流的处理，所以可以缩小MPEG解码设备的电路配置，并且还可以 为图片和时间信息之间的关系提供简单的管理。

公开(公告)号：US06414993B1

公开(公告)日：2002-07-02

申请号：US09407566

申请日：1999-09-28

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： H04B166

CPC分类号： H04N9/8042 ,  H04N19/423 ,  H04N19/61

摘要： An MPEG decoding system concurrently reproduces three pictures on a screen of a display unit on the basis of pieces of video data information representative of different kinds of pictures transferred through three data streams, and an MPEG video controller can select a frame memory from a set of frame memories assigned to any one of the data streams for storing the piece of video data information representative of any kind of picture so that the pictures are stable on the screen by virtue of elimination of a data read-out and a data write-in concurrently carried out on a frame memory in any frame period.

摘要翻译： MPEG解码系统基于代表通过三个数据流传送的不同种类的图像的视频数据信息同时在显示单元的屏幕上再现三个图像，并且MPEG视频控制器可以从一组 分配给任何一个数据流的帧存储器，用于存储表示任何种类的图像的视频数据信息，使得通过同时消除数据读出和数据写入，屏幕上的图像是稳定的 在任何帧周期内在帧存储器上执行。

公开(公告)号：US06366700B1

公开(公告)日：2002-04-02

申请号：US09277634

申请日：1999-03-26

申请人： Eiji Tsuboi ,  Kazuyosi Aoyama ,  Taizou Takahashi

发明人： Eiji Tsuboi ,  Kazuyosi Aoyama ,  Taizou Takahashi

IPC分类号： G06K936

CPC分类号： H04N19/427 ,  H04N19/423 ,  H04N19/61

摘要： An image data decoder decodes moving picture data and still MPEG or JPEG data alternately with each other. The decoder decodes the moving picture data without an interval between decoding adjacent macro block lines each including sixteen lines, thereby increasing the time interval between adjacent picture frames. The decoder decodes several slices or several macro block lines in the still MPEG data for the increased time interval without an additional data decoder.

摘要翻译： 图像数据解码器相互交替地解码运动图像数据和静止的MPEG或JPEG数据。 解码器解码运动图像数据，而不需要解码每个包括十六行的相邻宏块行之间的间隔，从而增加相邻图像帧之间的时间间隔。 解码器在静止MPEG数据中解码多个片或几个宏块行，以增加时间间隔，而无需附加数据解码器。

公开(公告)号：US5978508A

公开(公告)日：1999-11-02

申请号：US933079

申请日：1997-09-18

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： H04N19/60 ,  G06F17/14 ,  G06T9/00 ,  H03M7/30 ,  H04N1/41 ,  H04N19/423 ,  H04N19/625 ,  H04N19/85 ,  G06K9/36

CPC分类号： G06F17/147 ,  G06T9/007

摘要： A two-dimensional inverse discrete cosine transformation circuit of an MPEG2 video decoder including a one-dimensional inverse discrete cosine transformation circuit, an input switching circuit for receiving input of new data and data already subjected to first one-dimensional inverse discrete cosine transformation and sending one of them to the one-dimensional inverse discrete cosine transformation circuit, an input switching control circuit for controlling the input switching circuit so as to alternately and continuously output data output from a first serial-parallel conversion circuit and data output from a second serial-parallel conversion circuit, and a data allocation circuit for switching and controlling an output destination of output data of the one-dimensional inverse discrete cosine transformation circuit based on the timing of switching by the input switching control circuit.

摘要翻译： 包括一维逆离散余弦变换电路的MPEG2视频解码器的二维逆离散余弦变换电路，用于接收新数据的输入的输入切换电路和已经经过第一次一维反向离散余弦变换的数据和发送 其中一个对一维逆离散余弦变换电路，输入切换控制电路，用于控制输入切换电路，以便交替地连续地输出从第一串并转换电路输出的数据和从第二串行 - 并行转换电路输出的数据， 并行转换电路，以及数据分配电路，用于根据输入切换控制电路的切换时序来切换和控制一维逆离散余弦变换电路的输出数据的输出目的地。

公开(公告)号：US20060120462A1

公开(公告)日：2006-06-08

申请号：US11287363

申请日：2005-11-28

申请人： Eiji Tsuboi

发明人： Eiji Tsuboi

IPC分类号： H04N11/02 ,  H04N7/12 ,  H04N11/04 ,  H04B1/66

CPC分类号： H04N19/44 ,  H04N21/4305 ,  H04N21/4307 ,  H04N21/4347 ,  H04N21/44004

摘要： A compressed stream decoding apparatus to preventing a disturbance of a display image is disclosed. The compressed stream decoding apparatus includes: a first video data processor decoding an input first compressed video stream based on first reference time information added to the first compressed video stream, and outputting decoded video data based on the first reference time information; and a second video data processor performing alternatively a first processing and a second processing, wherein the first processing is decoding an input second compressed video stream based on second reference time information added to the second compressed video stream and outputting decoded video data based on the second reference time information; and the second processing is outputting the decoded video data decoded by the first video data processor based on the first reference time information.

摘要翻译： 公开了一种用于防止显示图像干扰的压缩流解码装置。 压缩流解码装置包括：第一视频数据处理器，基于添加到第一压缩视频流的第一参考时间信息对输入的第一压缩视频流进行解码，并且基于第一参考时间信息输出解码的视频数据; 以及第二视频数据处理器，交替地执行第一处理和第二处理，其中所述第一处理是基于添加到所述第二压缩视频流的第二参考时间信息来解码输入的第二压缩视频流，并且基于所述第二处理和第二处理输出解码的视频数据 参考时间信息; 并且第二处理是基于第一参考时间信息输出由第一视频数据处理器解码的解码视频数据。