Charging dock
    3.
    外观设计

    公开(公告)号:USD995421S1

    公开(公告)日:2023-08-15

    申请号:US29842022

    申请日:2022-06-09

    Abstract: FIG. 1 is a perspective view showing the front, left, and bottom sides of a charging dock showing our new design;
    FIG. 2 is a front plan view thereof;
    FIG. 3 is a back elevation view thereof;
    FIG. 4 is a top elevation view thereof;
    FIG. 5 is a bottom elevation view thereof;
    FIG. 6 is a left side elevation view thereof;
    FIG. 7 is a right side elevation view thereof;
    FIG. 8 is a front plan cross-sectional view in the direction of line 8-8 of FIG. 6; and,
    FIG. 9 is a bottom cross-sectional elevation view in the direction of line 9-9 of FIG. 6.
    The equal-length broken lines in the drawings depict portions of the charging dock that form no part of the claimed design. The dash-dot-dash broken lines define the boundaries of the claim.

    Disciplining crystals to synchronize timing of independent nodes

    公开(公告)号:US11784619B2

    公开(公告)日:2023-10-10

    申请号:US17494487

    申请日:2021-10-05

    Abstract: A circuit includes a first system-on-chip (SoC) driven by a first clock generator and a second SoC driven by a second clock generator where the first clock generator and the second clock generator have independent time bases. The first and second clock generators are synchronized using an RLC circuit external to the first clock generator and the second clock generator that converts an output of the first clock generator into current pulses and injects the current pulses into the second clock generator to pull an output of the second clock generator into synchronization with the output of the first clock generator. The RLC circuit converts a voltage output of the first clock generator into current pulses at the resonant frequency or specific harmonics of the output of the first clock generator. The second clock generator may include a ring oscillator into which the current pulses are injected.

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