公开(公告)号：US08339830B2

公开(公告)日：2012-12-25

申请号：US13233320

申请日：2011-09-15

申请人： Hideaki Yamauchi ,  Daichi Kaku ,  Takehiko Hojo

发明人： Hideaki Yamauchi ,  Daichi Kaku ,  Takehiko Hojo

IPC分类号： G11C17/00

CPC分类号： G11C11/5692 ,  G11C17/16 ,  G11C17/18

摘要： According to one embodiment, a memory cell is configured using a field effect transistor and includes n anti-fuse elements, one ends of which are connected in common. A program voltage selection circuit selects, out of the n anti-fuse elements, an anti-fuse element to which a program voltage is applied. A sense amplifier is provided for the each memory cell and determines, based on data stored in the n anti-fuse elements, three or more values of readout levels.

摘要翻译： 根据一个实施例，使用场效应晶体管配置存储单元，并且包括n个反熔丝元件，其一端共同连接。 编程电压选择电路在n个反熔丝元件中选择施加了编程电压的反熔丝元件。 为每个存储器单元提供读出放大器，并且基于存储在n个反熔丝元件中的数据确定三个或更多个读出电平值。

公开(公告)号：US20120320062A1

公开(公告)日：2012-12-20

申请号：US13548849

申请日：2012-07-13

申请人： Hideaki YAMAUCHI

发明人： Hideaki YAMAUCHI

IPC分类号： G06T11/20

CPC分类号： G06T11/40 ,  G06T11/203

摘要： A figure drawing device includes; a device 2 for increasing/decreasing the number of pixels on a scanning line up to the final painting pixel by one pixel; a device 3 for increasing/decreasing the number of scanning lines for drawing by one line; a device 4 for outputting drawing pixel data based on the control by the devices 1 and 2; a stencil buffer 5 for holding figure data in an intermediate stage of sequentially drawing a figure; a device 6 for holding pixel data read from the buffer 5 and consecutive as plural pieces of pixel data; a device 7 for detecting the transit state of the data value in the device 6; and a device 8 for inverting/non-inverting the logical operation result of the output data of the device 4 and the data in the device 6 and writing a result to the buffer 5.

摘要翻译： 图形绘制装置包括： 用于将扫描线上的像素数量增加/减少直到最终绘制像素一个像素的装置2; 用于增加/减少用于绘制一行的扫描线数量的装置3; 基于装置1和2的控制输出绘制像素数据的装置4; 用于在顺序绘制图形的中间阶段保持图形数据的模板缓冲器5; 用于保持从缓冲器5读取并连续作为多个像素数据的像素数据的装置6; 用于检测装置6中数据值的转接状态的装置7; 以及用于将装置4的输出数据和装置6中的数据的逻辑运算结果反相/非反相并将结果写入缓冲器5的装置8。

公开(公告)号：US20120243357A1

公开(公告)日：2012-09-27

申请号：US13233320

申请日：2011-09-15

申请人： Hideaki Yamauchi ,  Daichi Kaku ,  Takehiko Hojo

发明人： Hideaki Yamauchi ,  Daichi Kaku ,  Takehiko Hojo

IPC分类号： G11C7/06

CPC分类号： G11C11/5692 ,  G11C17/16 ,  G11C17/18

摘要： According to one embodiment, a memory cell is configured using a field effect transistor and includes n anti-fuse elements, one ends of which are connected in common. A program voltage selection circuit selects, out of the n anti-fuse elements, an anti-fuse element to which a program voltage is applied. A sense amplifier is provided for the each memory cell and determines, based on data stored in the n anti-fuse elements, three or more values of readout levels.

摘要翻译： 根据一个实施例，使用场效应晶体管配置存储单元，并且包括n个反熔丝元件，其一端共同连接。 编程电压选择电路在n个反熔丝元件中选择施加了编程电压的反熔丝元件。 为每个存储器单元提供读出放大器，并且基于存储在n个反熔丝元件中的数据确定三个或更多个读出电平值。

公开(公告)号：US08270179B2

公开(公告)日：2012-09-18

申请号：US12644155

申请日：2009-12-22

申请人： Hideaki Yamauchi ,  Haruya Sakuma ,  Masataka Saitoh

发明人： Hideaki Yamauchi ,  Haruya Sakuma ,  Masataka Saitoh

IPC分类号： H05K7/00

CPC分类号： H05K3/3415 ,  H05K1/0271 ,  H05K1/181 ,  H05K3/0052 ,  H05K3/0097 ,  H05K2201/09954 ,  H05K2203/0455 ,  H05K2203/1572 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/4913

摘要： In a case where the first component and the third component are mountable on the first circuit board pattern of the first individual board and the second component is mountable on the second circuit board pattern of the first individual board, or in a case where the first component is mountable on the first circuit board pattern of the second individual board, and the second component and the third component are mountable on the second circuit board pattern of the second individual board, in the first and second individual boards, traces for the third component are provided so that electrical connections between the third component and the other components are identical between the case where the third component is mounted on the first circuit board pattern, and the case where the third component is mounted on the second circuit board pattern.

摘要翻译： 在第一组件和第三组件可安装在第一单板的第一电路板图案上并且第二组件可安装在第一单板的第二电路板图案上的情况下，或者在第一组件 可安装在第二单板的第一电路板图案上，并且第二组件和第三组件可安装在第二单板的第二电路板图案上，在第一和第二单板中，第三组件的轨迹为 被设置为使得第三部件和其它部件之间的电连接在第三部件安装在第一电路板图案上的情况与第三部件安装在第二电路板图案上的情况之间是相同的。

公开(公告)号：US07796397B2

公开(公告)日：2010-09-14

申请号：US11843290

申请日：2007-08-22

申请人： Hideaki Yamauchi ,  Masayuki Asai ,  Shuusaku Yamamoto ,  Takashi Sakaguchi ,  Takashi Yamamoto

发明人： Hideaki Yamauchi ,  Masayuki Asai ,  Shuusaku Yamamoto ,  Takashi Sakaguchi ,  Takashi Yamamoto

IPC分类号： H05K7/00

CPC分类号： H01G2/14 ,  H01G9/00 ,  H05K1/0215 ,  H05K1/18 ,  H05K2201/10015 ,  H05K2201/10265 ,  H05K2201/10287 ,  H05K2203/304 ,  Y10T29/4913

摘要： Provided is an electronic components assembly capable of effectively dealing with unwanted charge accumulated in a capacitor even when general-purpose components are used. An assembly 10 includes an electrolytic capacitor 1, a coil lead 4, and a circuit mounting board 5. The electrolytic capacitor 1 includes a main body 1a, an anode lead 2, and a cathode lead 3. The coil lead 4 is wrapped around the main body 1a. The circuit mounting board 5 has the electrolytic capacitor 1 and the coil lead 4 mounted thereon. The coil lead 4 is connected to a ground of the circuit mounting board 5.

摘要翻译： 提供一种能够有效地处理积聚在电容器中的不需要的电荷的电子部件组件，即使在使用通用部件时也是如此。 组件10包括电解电容器1，线圈引线4和电路安装板5.电解电容器1包括主体1a，阳极引线2和阴极引线3.线圈引线4缠绕在 主体1a。 电路安装板5上安装有电解电容器1和线圈引线4。 线圈引线4连接到电路安装板5的接地。

公开(公告)号：US20100226193A1

公开(公告)日：2010-09-09

申请号：US12633238

申请日：2009-12-08

申请人： Hideaki Yamauchi ,  Hiroaki Nakano

发明人： Hideaki Yamauchi ,  Hiroaki Nakano

IPC分类号： G11C17/18 ,  H01L29/86

CPC分类号： G11C17/16 ,  G11C17/18

摘要： A unit memory circuit includes a fuse element capable of electrically programming data. A sense amplifier circuit is connected to the fuse element. The sense amplifier circuit senses data of the fuse element. Either of a first interconnect and a second interconnect is selectively formed by changing an interconnect formation mask. The first interconnect is short-circuiting the fuse element and the second interconnect is cutting off a current path when data is read from the fuse element.

摘要翻译： 单元存储电路包括能够电气编程数据的熔丝元件。 读出放大器电路连接到熔丝元件。 感测放大器电路感测保险丝元件的数据。 通过改变互连形成掩模来选择性地形成第一互连和第二互连中的任一个。 第一互连件使熔丝元件短路，当从保险丝元件读取数据时，第二互连件正在切断电流路径。

公开(公告)号：US20100002003A1

公开(公告)日：2010-01-07

申请号：US12557062

申请日：2009-09-10

申请人： Hideaki YAMAUCHI

发明人： Hideaki YAMAUCHI

IPC分类号： G06T11/20

CPC分类号： G06T11/40 ,  G06T11/203

摘要： A figure drawing device includes; a device 2 for increasing/decreasing the number of pixels on a scanning line up to the final painting pixel by one pixel; a device 3 for increasing/decreasing the number of scanning lines for drawing by one line; a device 4 for outputting drawing pixel data based on the control by the devices 1 and 2; a stencil buffer 5 for holding figure data in an intermediate stage of sequentially drawing a figure; a device 6 for holding pixel data read from the buffer 5 and consecutive as plural pieces of pixel data; a device 7 for detecting the transit state of the data value in the device 6; and a device 8 for inverting/non-inverting the logical operation result of the output data of the device 4 and the data in the device 6 and writing a result to the buffer 5.

摘要翻译： 图形绘制装置包括： 用于将扫描线上的像素数量增加/减少直到最终绘制像素一个像素的装置2; 用于增加/减少用于绘制一行的扫描线数量的装置3; 基于装置1和2的控制输出绘制像素数据的装置4; 用于在顺序绘制图形的中间阶段保持图形数据的模板缓冲器5; 用于保持从缓冲器5读取并连续作为多个像素数据的像素数据的装置6; 用于检测装置6中数据值的转接状态的装置7; 以及用于将装置4的输出数据和装置6中的数据的逻辑运算结果反相/非反相并将结果写入缓冲器5的装置8。

公开(公告)号：US20080289713A1

公开(公告)日：2008-11-27

申请号：US12124084

申请日：2008-05-20

申请人： Akihiro Munakata ,  Hideki Machimura ,  Hideaki Yamauchi ,  Daisuke Kitajima ,  Masashi Nemoto

发明人： Akihiro Munakata ,  Hideki Machimura ,  Hideaki Yamauchi ,  Daisuke Kitajima ,  Masashi Nemoto

IPC分类号： F16L55/04

CPC分类号： F02M55/04 ,  F02M59/102 ,  F02M59/366 ,  F02M59/367 ,  F02M59/48 ,  F02M63/0225 ,  F02M2200/315 ,  F04B11/0016

摘要： A fluid pressure pulsation damper mechanism comprising: a metal damper having two metal diaphragms joined together with a hermetic seal for forming a sealed spacing filled with a gas between the two metal diaphragms, an edge part at which are overlapped along outer peripheries thereof; a main body having a damper housing in which the metal damper is accommodated; and a cover attached to the main body to cover the damper housing and isolate the damper housing from an outside air, the metal damper being held between the cover and the main body; wherein the cover is further comprising: a metal plate for making the cover, a peripheral edge of the cover being joined to the main body, a plurality of inner convex curved parts extending toward the main body and a plurality of outer convex curved parts extending in a direction away from the main body, and a plurality of the inner convex curved parts and a plurality of the outer convex parts being disposed alternately inside the peripheral edge of the cover at which the cover is joined to the main body; wherein the cover is attached to the main body, ends of the plurality of inner convex curved parts touch one side of the edge part of the metal damper, which are outwardly formed in radial directions of a part including the sealed spacing in the metal damper; and the metal damper is held between the cover and a metal damper holding part of a holding member placed on the main body.

摘要翻译： 一种流体压力脉动阻尼机构，包括：具有两个金属隔膜的金属阻尼器，所述金属隔膜具有密封密封，用于在两个金属隔膜之间形成填充有气体的密封间隔，边缘部分沿着其外周重叠; 主体，其具有容纳金属阻尼器的阻尼器壳体; 以及盖，其附接到主体以覆盖阻尼器壳体并将阻尼器壳体与外部空气隔离，金属阻尼器保持在盖和主体之间; 其特征在于，所述盖还包括：用于制造所述盖的金属板，所述盖的周缘连接到所述主体，多个向所述主体延伸的内凸曲面部分，以及多个外凸曲面部分， 远离主体的方向，并且多个内凸曲面部分和多个外凸部交替地设置在盖的周边边缘内，盖与主体接合; 其特征在于，所述盖附接到所述主体，所述多个内凸曲面部的端部接触所述金属阻尼器的边缘部分的一侧，所述金属阻尼器的边缘部分在包括所述金属阻尼器中的所述密封间隔的部分的径向方向上向外形成; 并且金属阻尼器保持在盖和放置在主体上的保持构件的金属阻尼器保持部分之间。

公开(公告)号：US20080284494A1

公开(公告)日：2008-11-20

申请号：US12118033

申请日：2008-05-09

申请人： Hideaki Yamauchi ,  Akikuni Sato ,  Takehiko Hojo

发明人： Hideaki Yamauchi ,  Akikuni Sato ,  Takehiko Hojo

IPC分类号： H01H37/76

CPC分类号： H01L27/101 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fuse device includes a plurality of serially connected fuse elements whose number is n (n is an integer of two or more), a power source connected to one end of a first fuse element that is a top of the n serially connected fuse elements, and a plurality of program control transistors. Each of the program control transistors is connected to each of nodes between the fuse elements, and to an end of the n-th fuse element, respectively.

摘要翻译： 保险丝装置包括多个串联连接的熔丝元件，其数量为n（n为2以上的整数），连接到作为n个串联连接的熔丝元件的顶部的第一熔丝元件的一端的电源， 和多个程序控制晶体管。 每个编程控制晶体管分别连接到熔丝元件之间的每个节点，并分别连接到第n个熔丝元件的端部。

公开(公告)号：US20080049408A1

公开(公告)日：2008-02-28

申请号：US11843290

申请日：2007-08-22

申请人： Hideaki YAMAUCHI ,  Masayuki ASAI ,  Shuusaku YAMAMOTO ,  Takashi SAKAGUCHI ,  Takashi YAMAMOTO

发明人： Hideaki YAMAUCHI ,  Masayuki ASAI ,  Shuusaku YAMAMOTO ,  Takashi SAKAGUCHI ,  Takashi YAMAMOTO

IPC分类号： H01R12/02 ,  H05K3/30

CPC分类号： H01G2/14 ,  H01G9/00 ,  H05K1/0215 ,  H05K1/18 ,  H05K2201/10015 ,  H05K2201/10265 ,  H05K2201/10287 ,  H05K2203/304 ,  Y10T29/4913

摘要： Provided is an electronic components assembly capable of effectively dealing with unwanted charge accumulated in a capacitor even when general-purpose components are used. An assembly 10 includes an electrolytic capacitor 1, a coil lead 4, and a circuit mounting board 5. The electrolytic capacitor 1 includes a main body 1a, an anode lead 2, and a cathode lead 3. The coil lead 4 is wrapped around the main body 1a. The circuit mounting board 5 has the electrolytic capacitor 1 and the coil lead 4 mounted thereon. The coil lead 4 is connected to a ground of the circuit mounting board 5.

摘要翻译： 提供一种能够有效地处理积聚在电容器中的不需要的电荷的电子部件组件，即使在使用通用部件时也是如此。 组件10包括电解电容器1，线圈引线4和电路安装板5。 电解电容器1包括主体1a，阳极引线2和阴极引线3.线圈引线4缠绕在主体1a上。 电路安装板5上安装有电解电容器1和线圈引线4。 线圈引线4连接到电路安装板5的接地。