Abstract:
Provided is a method of manufacturing a semiconductor device wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The method of manufacturing a semiconductor device of the present invention includes preparing a semiconductor wafer with a plurality of members for connection formed on both first and second surfaces; preparing a laminated film including a dicing sheet with a pressure-sensitive adhesive layer laminated on a base material, and a curable film that is laminated on the pressure-sensitive adhesive layer and has a thickness equivalent to or more than the height of the member for connection on the first surface; pasting the curable film of the laminated film to the semiconductor wafer while facing the curable film to the first surface so that the members for connection are not exposed to the pressure-sensitive adhesive layer; and dicing the semiconductor wafer to form a semiconductor element.
Abstract:
Provided is a laminated film wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The laminated film of the present invention is a laminated film for filling the space between semiconductor elements that are electrically connected through a member or connection, the film including a dicing sheet in which a pressure-sensitive adhesive layer is laminated on a base material and a curable film that is laminated on the pressure-sensitive adhesive layer, wherein the curable film has a lowest melt viscosity at 50 to 200° C. of 1×102 Pa·s or more and 1×104 Pa·s or less.
Abstract:
Provided is a method of manufacturing a semiconductor device wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The method of manufacturing a semiconductor device of the present invention includes preparing a semiconductor wafer with a plurality of members for connection formed on both first and second surfaces; preparing a laminated film including a dicing sheet with a pressure-sensitive adhesive layer laminated on a base material, and a curable film that is laminated on the pressure-sensitive adhesive layer and has a thickness equivalent to or more than the height of the member for connection on the first surface; pasting the curable film of the laminated film to the semiconductor wafer while facing the curable film to the first surface so that the members for connection are not exposed to the pressure-sensitive adhesive layer; and dicing the semiconductor wafer to form a semiconductor element.
Abstract:
Provided is a laminated film wherein the space between semiconductor elements that are three-dimensionally mounted can be filled easily and securely. The laminated film of the present invention is a laminated film for filling the space between semiconductor elements that are electrically connected through a member or connection, the film including a dicing sheet in which a pressure-sensitive adhesive layer is laminated on a base material and a curable film that is laminated on the pressure-sensitive adhesive layer, wherein the curable film has a lowest melt viscosity at 50 to 200° C. of 1×102 Pa·s or more and 1×104 Pa·s or less.
Abstract:
Provided are an encapsulating resin sheet having improved a connection reliability by improving a connection failure, and by suppressing intrusion of an inorganic filler between terminals of the semiconductor element and the interconnection circuit substrate, a semiconductor device using the same, and a fabricating method for the semiconductor device. The encapsulating resin sheet is an epoxy resin composition sheet having a two-layer structure of an inorganic filler containing layer and an inorganic filler non-containing layer, in which a melt viscosity of the inorganic filler containing layer is 1.0×102 to 2.0×104 Pa·s, a melt viscosity of the inorganic filler non-containing layer is 1.0×103 to 2.0×105 Pa·s, a viscosity difference between both layers is 1.5×104 Pa·s or more; and a thickness of the inorganic filler non-containing layer is ⅓ to ⅘ of a height of the connecting electrode portion formed in the semiconductor element.