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216 条记录 (耗时 0.026 秒)

    Method and apparatus for determining connection relation of subspaces, and non-transitory computer-readable recording medium
    2.
    发明授权
    Method and apparatus for determining connection relation of subspaces, and non-transitory computer-readable recording medium 有权

    公开(公告)号：US12069374B2

    公开(公告)日：2024-08-20

    申请号：US17807932

    申请日：2022-06-21

    申请人： Haijing Jia ,  Hong Yi ,  Liyan Liu ,  Wei Wang

    发明人： Haijing Jia ,  Hong Yi ,  Liyan Liu ,  Wei Wang

    IPC分类号： H04N23/698 ,  G06T5/50 ,  G06T7/73 ,  H04N23/80

    CPC分类号： H04N23/698 ,  G06T5/50 ,  G06T7/73 ,  H04N23/80

    摘要： A method and an apparatus for determining a connection relation of subspaces, and a non-transitory computer-readable recording medium are provided. In the method, a plurality of sets of panoramic images respectively corresponding to two respective adjacent subspaces are obtained. Each set of the panoramic images includes two first panoramic images, and a second panoramic image photographed at a connection opening. Orientations of the connection openings are determined based on positions of the connection openings, and orientations of a camera. Relative positions of the two adjacent subspaces are determined based on correspondence relations between the two first panoramic images and parts of the respective second panoramic images. The connection relation of the subspaces is determined based on the connection relation determined based on the same subspace, the orientations of the connection openings, and the relative positions of the two adjacent subspaces.

    Dynamic pipeline reconfiguration including changing a number of stages
    6.
    发明授权
    Dynamic pipeline reconfiguration including changing a number of stages 有权
    动态管道重新配置，包括改变多个阶段

    公开(公告)号：US08806181B1

    公开(公告)日：2014-08-12

    申请号：US12434155

    申请日：2009-05-01

    申请人： R. Frank O'Bleness ,  Sujat Jamil ,  Timothy S. Beatty ,  Franco Ricci ,  Tom Hameenanttila ,  Hong-Yi Chen

    发明人： R. Frank O'Bleness ,  Sujat Jamil ,  Timothy S. Beatty ,  Franco Ricci ,  Tom Hameenanttila ,  Hong-Yi Chen

    IPC分类号： G06F9/38

    CPC分类号： G06F9/3873 ,  G06F9/3869

    摘要： According to some embodiments, an apparatus having corresponding methods includes a storage module configured to store data and instructions; a first processor pipeline configured to process the data and instructions when the first processor pipeline is selected; a second processor pipeline configured to process the data and instructions when the second processor pipeline is selected; and a selection module configured to select either the first processor pipeline or the second processor pipeline.

    摘要翻译： 根据一些实施例，具有相应方法的装置包括被配置为存储数据和指令的存储模块; 配置为当选择所述第一处理器流水线时处理所述数据和指令的第一处理器流水线; 配置为当选择所述第二处理器管线时处理所述数据和指令的第二处理器流水线; 以及选择模块，被配置为选择第一处理器流水线或第二处理器流水线。

    Method and apparatus for controlling bias point of differential quadrature phase shift keying demodulator
    7.
    发明授权
    Method and apparatus for controlling bias point of differential quadrature phase shift keying demodulator 有权
    用于控制差分正交相移键控解调器偏置点的方法和装置

    公开(公告)号：US08774645B2

    公开(公告)日：2014-07-08

    申请号：US13634469

    申请日：2010-08-20

    申请人： Jianhua Chen ,  Hong Yi

    发明人： Jianhua Chen ,  Hong Yi

    IPC分类号： H04B10/06

    CPC分类号： H04B10/69 ,  H04B10/50575 ,  H04B10/50577 ,  H04B10/677

    摘要： Method and apparatus for controlling bias point of DQPSK demodulator are disclosed. The method comprises: step 1: respectively applying first and second bias voltages to I-path and Q-path, and applying identical pilot voltage signals to I-path and Q-path (S202); step 2: executing filtering processing on I-path and Q-path differential current signals collected by balance receiver and determining θIand θQ (S204); step 3: performing feedback control to first and second bias voltages respectively according to θI and θQ so that θI and θQ respectively reaches expected bias point values of I-path and Q-path (S206); executing step 2 and 3 cyclically at preset regular intervals (S208), so that θI and θQ remains consistently the expected bias point values of I-path and Q-path. The solution enables bias point of DQPSK demodulator to be locked at any expected bias point value, facilitates realization of digitization, and is not easily influenced.

    摘要翻译： 公开了用于控制DQPSK解调器偏置点的方法和装置。 该方法包括：步骤1：分别对I路径和Q路径施加第一和第二偏置电压，并向I路径和Q路径施加相同的导频电压信号（S202）; 步骤2：对平衡接收机收集的I路径和Q路径差分电流信号执行滤波处理和确定; Iand＆thetas; Q（S204）; 步骤3：分别根据I和I等级Q对第一和第二偏置电压进行反馈控制，使得I和I等于Q分别达到I路径和Q路径的预期偏置点值（S206）; 以预定的时间间隔循环执行步骤2和3（S208），使得I和＆amp; t; Q保持一致地是I-path和Q-path的预期偏置点值。 该解决方案使DQPSK解调器的偏置点能够被锁定在任何预期的偏置点值，便于数字化的实现，并且不容易受到影响。

    Method and apparatus for determining bias point of modulator
    8.
    发明授权
    Method and apparatus for determining bias point of modulator 有权
    用于确定调制器偏置点的方法和装置

    公开(公告)号：US08743448B2

    公开(公告)日：2014-06-03

    申请号：US13637026

    申请日：2010-08-16

    申请人： Jianhua Chen ,  Hong Yi

    发明人： Jianhua Chen ,  Hong Yi

    IPC分类号： G02F1/01

    CPC分类号： G02F1/0123 ,  G02F1/225 ,  G02F2001/212 ,  H04B10/50575

    摘要： The disclosure discloses a method and an apparatus for determining a bias point of a modulator, wherein the method includes: adding pilot signals to the bias voltages of the modulator; adjusting the bias point of the modulator at a predetermined step and acquiring a first harmonic amplitude value corresponding to each bias point in a backlight detection current signal output by the modulator; and determining a bias point corresponding to the maximum value of the first harmonic amplitude values associated with multiple bias points as the bias point of the modulator. By virtue of the disclosure, the detection of a difference frequency signal can be eliminated, thereby reducing the complexity and cost of a periphery control circuit while ensuring the control accuracy, effectively improving the stability and reliability of the control process, and improving the modulation and transmission performance of optical signals in the whole system.

    摘要翻译： 本公开公开了一种用于确定调制器的偏置点的方法和装置，其中该方法包括：将导频信号添加到调制器的偏置电压; 在预定步骤调整调制器的偏置点，并获取由调制器输出的背光检测电流信号中对应于每个偏置点的一次谐波振幅值; 并且确定对应于与多个偏置点相关联的一次谐波振幅值的最大值的偏置点作为调制器的偏置点。 凭借本公开，可以消除差分频率信号的检测，从而降低外围控制电路的复杂性和成本，同时确保控制精度，有效提高控制过程的稳定性和可靠性，并改进调制和 光信号在整个系统中的传输性能。

    Low power computer with main and auxiliary processors
    10.
    发明授权
    Low power computer with main and auxiliary processors 有权
    低功耗电脑配有主处理器和辅助处理器

    公开(公告)号：US08572416B2

    公开(公告)日：2013-10-29

    申请号：US12787478

    申请日：2010-05-26

    申请人： Sehat Sutardja ,  Hong-Yi Chen

    发明人： Sehat Sutardja ,  Hong-Yi Chen

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3293 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3275 ,  G06F12/08 ,  G06F12/0866 ,  G06F12/0897 ,  G06F13/28 ,  G06F2212/222 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

    摘要： A processing device including first processors, second processors, a first chipset, and a second chipset. The first chipset is in communication with the first processors via a first bus. The second chipset is in communication with the first chipset via a second bus and is directly connected to the second processors. The first chipset and the second chipset are connected between (i) the first processors and (ii) a first non-volatile memory and a second non-volatile memory. The second chipset is connected between (i) the second processors and (ii) the first non-volatile memory and the second non-volatile memory. The first processors access the first non-volatile memory during a first power mode. The second processors access the second non-volatile memory during a second power mode that is different than the first power mode.

    摘要翻译： 一种处理装置，包括第一处理器，第二处理器，第一芯片组和第二芯片组。 第一芯片组通过第一总线与第一处理器通信。 第二芯片组通过第二总线与第一芯片组通信，并且直接连接到第二处理器。 第一芯片组和第二芯片组连接在（i）第一处理器和（ii）第一非易失性存储器和第二非易失性存储器之间。 第二芯片组连接在（i）第二处理器和（ii）第一非易失性存储器和第二非易失性存储器之间。 第一个处理器在第一个功率模式下访问第一个非易失性存储器。 在与第一功率模式不同的第二功率模式期间，第二处理器访问第二非易失性存储器。