Abstract:
A gas conduit for a load lock chamber. The gas conduit connects to a gas source to introduce gas from the gas source into the load lock chamber of semiconductor equipment. The structure includes a filter mounted on the top surface of the load lock chamber, a pressure limitative device to maintain a preset pressure of gas source, and a gas inlet device including an inlet end connected to the pressure limitative device and an outlet end connected to the filter, wherein the gas inlet device introduces gas from the gas source into the load lock chamber with its maximum flow rate when breaching the vacuum therein.
Abstract:
This invention relates to an improved pillow having a multiple layer configuration. The pillow comprises an inner core, an intermediate layer and a surface layer. The inner core is integrally formed by three different materials each of which them has different elastic capability. The inner core has a corrugated outer surface. The inner core is further enclosed by an intermediate layer and is integrally formed by three different materials each of which them has different elastic capability. The intermediate layer has a smooth inner surface and a corrugated outer surface. The surface layer is made from son foam and has a smooth inner surface and a corrugated outer surface. By this arrangement, a supporting gradient is established in the resulting pillow. The pillow can be readily oriented to obtain suitable support for the head an neck portions to meet different requirements from the user. A plurality of air gaps are formed by the interference fit between the corrugated outer surface and smooth inner surface of two adjacent layers. When the pillow is compressed and released, the air trapped within the air gaps are squeezed and ventilated to provide an amiable contacting feeling to the head and neck portion. The resulting pillow can be cleaned and dehydrated by a washing machine without deforming. The resulting pillow can be readily packed by a vacuum process for storage and transportation.
Abstract:
A method of removing HDP oxide deposition comprises the steps of: (1) etching the HDP oxide deposition by in-side-out model, wherein the etching rate in the center of the substrate is faster than the edges of the substrate; (2) etching the HDP oxide deposition by out-side-in model, wherein the etching rate in the edges of the substrate is faster than the center of the substrate; and (3) removing the remaining silicon oxide layer using chemical-mechanical polishing (CMP). According to the method of the invention, the HDP oxide deposition can be planarized more uniform.
Abstract:
The current invention provides a method for analyzing process variations that occur during integrated circuit fabrication. Critical dimension data is collected for each layer of the integrated circuit fabrication process for a period of time and a shift indicator that indicates variation in the critical dimension data for each layer of the integrated circuit fabrication process is calculated. A machine drift significance indicator is also calculated for each machine used in each layer of the integrated circuit fabrication process, and a maximum shift of mean value for each layer of the integrated circuit fabrication process is defined. The shift indicator, the maximum shift of mean value and the machine drift significance indicator are used to determine at least one likely cause of variation in critical dimension for each layer of the integrated circuit fabrication process.