摘要:
In one aspect, an automatic gain control (AGC) for applying a variable gain to a broadband signal is provided. The AGC comprises a variable gain amplifier adapted to receive the broadband signal as an input, the variable gain amplifier configured to apply a variable gain to the broadband signal based on a value of a gain signal to provide an amplified broadband signal, and a controller to provide the gain signal to the variable gain amplifier, the controller adapted to determine the value of the gain signal based on at least one characteristic of the amplified broadband signal. In a further aspect, the one or more characteristic is a power characteristic of the broadband signal that facilitates control of the broadband signal within a desired power range.
摘要:
Methods and apparatus for tuning are disclosed. One embodiment of the invention is directed to a tuner formed on a substrate. The tuner comprises a first die that receives an analog input signal and processes the analog input signal using analog processing circuitry to form analog output signals, and a second die that receives the analog output signals, converts the analog output signals to digital signals, and processes the digital signals to form output signals. Another embodiment of the invention is directed to a multi-chip module comprising a tuner adapted to process television signals of a plurality of types and of a plurality of standards to form output signals. A further embodiment of the invention is directed to a method that comprises receiving an analog signal from a signal source, filtering the analog signal to remove a portion of the analog signal, converting the analog signal to quadrature analog signals, converting the quadrature analog signals to digital signals, and filtering the digital signals to substantially isolate a channel of interest.
摘要:
A versatile, programmable, low-cost transmit line driver is provided. The line driver includes a digital-to-analog converter that receives a digital input and provides an analog output. The line driver is reconfigurable between the voltage mode of operation.
摘要:
Methods and apparatus for tuning are disclosed. One embodiment of the invention is directed to a tuner formed on a substrate. The tuner comprises a first die that receives an analog input signal and processes the analog input signal using analog processing circuitry to form analog output signals, and a second die that receives the analog output signals, converts the analog output signals to digital signals, and processes the digital signals to form output signals. Another embodiment of the invention is directed to a multi-chip module comprising a tuner adapted to process television signals of a plurality of types and of a plurality of standards to form output signals. A further embodiment of the invention is directed to a method that comprises receiving an analog signal from a signal source, filtering the analog signal to remove a portion of the analog signal, converting the analog signal to quadrature analog signals, converting the quadrature analog signals to digital signals, and filtering the digital signals to substantially isolate a channel of interest.
摘要:
This invention provides apparatus and a method to assist in calibrating a read channel in a magnetic data storage system. More particularly, the invention provides a read channel including a digital noise generator. During a calibration procedure, the digital noise generator injects an analog noise signal into the read channel, thereby increasing the read channel's bit-error rate, and consequently allowing rapid calibration of the read channel. The digital noise generator comprises a number of linear feedback shift registers that together generate a pseudo-random digital word sequence, and a digital-to-analog converter that converts the pseudo-random digital word sequence into the analog noise signal. The digital-to-analog converter comprises a plurality of one-bit digital-to-analog converters whose outputs are summed by an analog adder. This configuration causes the analog noise signal to exhibit a binomial probability distribution which is close to a normal probability distribution for a sufficiently large number of linear feedback shift registers. The linear feedback shift registers are driven by a clock that operates at a higher frequency than the rate at which data is processed in the read channel. The analog noise signal, therefore, has bandwidth that is wider than that of the data, thereby insuring that calibration of the read channel includes effects due to aliasing. The digital noise generator is disabled while the read head passes over synchronization marks and embedded servo wedges.
摘要:
Disclosed is an amplifier designed to substantially reduce an ON/OFF transient. The amplifier comprises a drive block that includes a pre-driver and an output stage. The amplifier also comprises a bypass circuit that is coupled to an output of the pre-driver. The bypass circuit of the amplifier is selectively activated to reduce the ON/OFF transient. The bypass circuit may comprise an auxiliary output stage that can be coupled to provide selective activation. The amplifier may also be configured to provide multi-point offset compensation. Also disclosed is a related method. The amplifier and the related method may be incorporated into an audio amplifier used in a cellular telephone or other mobile audio device.
摘要:
A differential variable gain amplifier (VGA) with constant input impedance and an adjustable one-pole filtering characteristic is provided. Each input of the VGA has a set of parallel resistors connected thereto. Except for one resistor in each set, each of the resistors of the two sets is connected to its corresponding summing junction (op-amp input), or to a corresponding resistor of the other set via a switch. Switching the resistors to their corresponding summing junction or to the corresponding resistor of the other set provides for the variable gain function, where the gain is proportional to the number of resistors connected to the summing junction. The configuration of resistors provides a constant input impedance to the VGA of R/(n+1), where R is the resistance value of the resistors. In addition to the input resistor networks, the VGA comprises a fixed feedback resistance, along with a parallel capacitor array in the feedback paths of the differential op-amp to provide one-pole filtering of the input signal. To maintain the filtering characteristics constant for a change in the gain, the op-amp comprises an internal compensation network for adjusting the open-loop bandwidth of the op-amp.
摘要:
A method and system for high bandwidth, high gain offset compensation in a read channel integrated circuit includes zeroing the analog read signal applied to the signal path at a first location in the read channel integrated circuit path prior to a first amplifier which has a first gain and a first bandwidth magnitude characteristic with a high frequency boost; coupling a signal from the first amplifier to a second amplifier which has a second gain larger than the first and a second bandwidth magnitude characteristic having high frequency roll-off; and further coupling the signal further from the second amplifier to a storage device and feeding back the signal stored in the storage device to the first amplifier to apply the high frequency boost of the first bandwidth magnitude characteristic to compensate for the high frequency roll-off of the second bandwidth magnitude characteristic; decoupling the signal from the storage device and removing the zeroing of the analog read signal applied to the signal path.
摘要:
A tunable, active RC filter and method of tuning the active RC filter which prevents distortions introduced during tuning. Generally, each tuning element in the feedback loop of the tunable active RC filter comprises a capacitor, a first switch, a second switch, and a third switch. The first switch connects a first terminal of the capacitor to a summing junction at the input of the op-amp when closed. When closed, a second switch connects the first terminal of the capacitor to a replica of the voltage present at the summing junction (input) of the op-amp to which the first terminal of the reactance element is connectable via the first switch. A third switch, when closed, connects the first terminal of the capacitor to the second terminal of the reactance element, which is connected the output of the op-amp. By connected the capacitor to the replica voltage via the second switch prior to connecting it to the summing junction at the input of the op-amp, the capacitor is pre-charged to the voltage it would have if present in the feedback path. Therefore, as the capacitor is pre-charged, the output voltage of the op-amp is not presented to the summing junction when the capacitor is switched in, which substantially eliminates the distortions caused by connecting the capacitors to the summing junction. The third switch is utilized to short the capacitor when it is disconnected from the summing junction.
摘要:
An analog-to-digital converter including a quantizer and a residue generator, both of which sample an input voltage in parallel. The sampling characteristics of each of the residue generator and the quantizer are designed to substantially match one another. This converter may be used as a low-power ADC front-end circuit that does not require a dedicated sampleand-hold circuit. The front-end circuit consists of two substantially-matched sampling networks, one for the residue generator and the other for the quantizer, inside the first stage of the converter.