摘要:
A method, system and program are provided for generating level sensitive scan design (LSSD) clock signals from a general scan design (GSD) clock buffer using an intermediate clock signal and one or more first mode control signals to generate a plurality of LSSD clock signals from an output section of the GSD clock buffer that receives the intermediate clock signal and the first mode control signal(s), where the GSD clock buffer is also configured to generate a plurality of GSD clock signals in response to receiving a GSD mode, generating an intermediate clock signal from the input section of the GSD clock buffer in response receiving a GSD mode signal.
摘要:
A media player for disc jockeys is disclosed. The media player includes a housing including a front face, a rear face, a left side and a right side. A plurality of input ports configured to connect a digital storage device containing a number of media tracks. A first and a second media output are included. The media player includes a first deck having a first media control interface configured to cue and play media tracks, and a second deck having a second media control interface configured to cue and play media tracks, and a global control interface including a main display screen divide into three portions. A digital mixing controller for accessing and controlling the digital storage device through the respective one of the respective input ports is also included.
摘要:
The present invention provides a circuit for increasing the noise tolerance of a receiving gate. This is accomplished by separating the circuit which sets the positive going threshold, from the circuit which sets the negative going threshold. This eliminates the need of making a design compromise equally suitable to both these threshold requirements. It is achieved by separating the logical drive for switching from a low to a high from the logical drive for switching from a high to a low. Alternate embodiments are presented. In one embodiment, separate drivers for PFET and NFET inverter inputs are employed together with an output latch circuit which prevents the output from being in a floating state. In an alternate embodiment the latch is included in-line with the gate output. An implementation of the invention in a two input AND gate is also described.
摘要:
A system implementing a methodology for determining the exponent in parallel with determining the fractional shift during normalization according to partitioning the exponent into partial exponent groups according to the fractional shift data flow, determining all possible partial exponent values for each partial exponent group according to the fractional data flow, and providing the exponent by selectively combining possible partial exponents from each partial exponent group according to the fractional data flow. There is also provided a system implementing a methodology for generating the sticky bit during normalization. Sticky bit information is precalculated and multiplexed according to the fractional dataflow. In an embodiment of the invention, group sticky signals are calculated in tree form, each group sticky having a number of possible sticky bits corresponding to the shift increment amount of the multiplexing. The group sticky bits are further multiplexed according to subsequent shift amounts in the fractional dataflow to provide an output sticky bit at substantially the same time as when the final fractional shift amount is available, and thereby at substantially the same time as the normalized fraction.
摘要:
A method, system and program are provided for generating level sensitive scan design (LSSD) clock signals from a general scan design (GSD) clock buffer using an intermediate clock signal and one or more first mode control signals to generate a plurality of LSSD clock signals from an output section of the GSD clock buffer that receives the intermediate clock signal and the first mode control signal(s), where the GSD clock buffer is also configured to generate a plurality of GSD clock signals in response to receiving a GSD mode, generating an intermediate clock signal from the input section of the GSD clock buffer in response receiving a GSD mode signal.
摘要:
A media player for a disc jockey is disclosed. The media player includes a housing with a top surface with a surface defining a seat configured to received a portable media device with a library of media tracks stored thereon. The seat includes an input port for connecting to the portable media device. The media player includes a master output, a first and a second deck having a first and second media control interface configured to cue and play media tracks on a first and second channel, respectively, and a global control interface including a main display, a rotatable and pressable select knob and a number of multifunction controls having contextual function labels associated therewith for navigating menus and selecting menu choices contained therein. A mixing controller is communicatingly connected to the interfaces, the input port, and the master output for accessing and controlling the portable media device according to selections made on the interfaces, for selectively mixing the first and the second channel into a mixed signal and routing the mixed signal out the master output.
摘要:
A combined computer media player and computer controller is disclosed. The apparatus includes a main housing with media controls thereon and a processor therein. An input port for connecting a mass storage device to the processor so the processor has access to media files thereon. An optical disc reader located in the housing and connected to the processor so the processor has access to media files thereon. The media files are playable, controllable, mixable and modifiable by the media controls. The apparatus further includes media output ports on the main housing that are connected to the processor to output a media files for listening or viewing. An input port for connecting the apparatus to a computer is included so the apparatus can control software running thereon.
摘要:
A system implementing a methodology for determining the exponent in parallel with determining the fractional shift during normalization according to partitioning the exponent into partial exponent groups according to the fractional shift data flow, determining all possible partial exponent values for each partial exponent group according to the fractional data flow, and providing the exponent by selectively combining possible partial exponents from each partial exponent group according to the fractional data flow. There is also provided a system implementing a methodology for generating the sticky bit during normalization. Sticky bit information is precalculated and multiplexed according to the fractional dataflow. In an embodiment of the invention, group sticky signals are calculated in tree form, each group sticky having a number of possible sticky bits corresponding to the shift increment amount of the multiplexing. The group sticky bits are further multiplexed according to subsequent shift amounts in the fractional damflow to provide an output sticky bit at substantially the same time as when the final fractional shift amount is available, and thereby at substantially the same time as the normalized fraction.
摘要:
A system implementing a methodology for determining the exponent in parallel with determining the fractional shift during normalization according to partitioning the exponent into partial exponent groups according to the fractional shift data flow, determining all possible partial exponent values for each partial exponent group according to the fractional data flow, and providing the exponent by selectively combining possible partial exponents from each partial exponent group according to the fractional data flow. There is also provided a system implementing a methodology for generating the sticky bit during normalization. Sticky bit information is precalculated and multiplexed according to the fractional dataflow. In an embodiment of the invention, group sticky signals are calculated in tree form, each group sticky having a number of possible sticky bits corresponding to the shift increment amount of the multiplexing. The group sticky bits are further multiplexed according to subsequent shift amounts in the fractional dataflow to provide an output sticky bit at substantially the same time as when the final fractional shift amount is available, and thereby at substantially the same time as the normalized fraction.
摘要:
Apparatus for joining a pair of flanged beams in an end-to-end relationship includes a pair of end plates each welded to an end of a corresponding one of the flanged beams. Each of the end plates has a notch therein which is aligned with the notch in the other plate and the end plates juxtapose. A clamp having a body portion which mates with the notches in the end plates, and having a radial flange on each side of the body portion, is secured with the body portion in the notches. The radial flanges of the clamp presses against the end plates to lock the plates securely together.