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    INTEGRATED CIRCUIT DEVICES INCLUDING FIN SHAPES
    1.
    发明申请
    INTEGRATED CIRCUIT DEVICES INCLUDING FIN SHAPES 有权
    集成电路设备，包括FIN形状

    公开(公告)号：US20160260719A1

    公开(公告)日：2016-09-08

    申请号：US14969778

    申请日：2015-12-15

    申请人： Jae-yup Chung

    发明人： Jae-yup Chung

    IPC分类号： H01L27/11 ,  H01L29/06 ,  H01L27/02 ,  H01L29/78

    CPC分类号： H01L27/1104 ,  H01L27/0207 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/66818 ,  H01L29/7851 ,  H01L29/7854

    摘要： Integrated circuit devices are provided. An integrated circuit device includes a substrate having first and second fin-shaped Field Effect Transistor (FinFET) bodies protruding from the substrate. The first and second FinFET bodies have different respective first and second shapes in a first region and a second region, respectively, of the integrated circuit device.

    摘要翻译： 提供集成电路设备。 集成电路器件包括具有从衬底突出的第一和第二鳍状场效应晶体管（FinFET）体的衬底。 第一和第二FinFET体在分别在集成电路器件的第一区域和第二区域中具有不同的相应的第一和第二形状。

    Integrated circuit device and method of manufacturing the same
    3.
    发明授权
    Integrated circuit device and method of manufacturing the same 有权

    公开(公告)号：US09893064B2

    公开(公告)日：2018-02-13

    申请号：US15007533

    申请日：2016-01-27

    申请人： Jae-yup Chung

    发明人： Jae-yup Chung

    IPC分类号： H01L27/092 ,  H01L27/11 ,  H01L27/02

    CPC分类号： H01L27/0924 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/1104 ,  H01L29/41791

    摘要： An integrated circuit device includes a substrate, first and second fin-type active areas which extend in a first direction on the substrate, first and second gate lines on the substrate that extend in a second direction that crosses the first direction, and first and second contact structures. The first and second gate lines intersect the first and second fin-type active areas, respectively. The first contact structure is on the first fin-type active area at a side of the first gate line and contacts the first gate line. The second contact structure is on the second fin-type active area at a side of the second gate line. The first contact structure includes a first lower contact including metal silicide and a first upper contact on the first lower contact. The second contact structure includes a second lower contact including metal silicide and a second upper contact on the second lower contact.

    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    集成电路装置及其制造方法

    公开(公告)号：US20160284705A1

    公开(公告)日：2016-09-29

    申请号：US15007533

    申请日：2016-01-27

    申请人： JAE-YUP CHUNG

    发明人： JAE-YUP CHUNG

    IPC分类号： H01L27/092 ,  H01L29/49 ,  H01L27/11

    CPC分类号： H01L27/0924 ,  H01L21/823821 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/1104 ,  H01L29/41791

    摘要： An integrated circuit device includes a substrate, first and second fin-type active areas which extend in a first direction on the substrate, first and second gate lines on the substrate that extend in a second direction that crosses the first direction, and first and second contact structures. The first and second gate lines intersect the first and second fin-type active areas, respectively. The first contact structure is on the first fin-type active area at a side of the first gate line and contacts the first gate line. The second contact structure is on the second fin-type active area at a side of the second gate line. The first contact structure includes a first lower contact including metal silicide and a first upper contact on the first lower contact. The second contact structure includes a second lower contact including metal silicide and a second upper contact on the second lower contact.

    摘要翻译： 一种集成电路装置，包括基板，在基板上沿第一方向延伸的第一和第二鳍状有源区，在基板上沿与第一方向相反的第二方向延伸的第一和第二栅极线，以及第一和第二 接触结构。 第一和第二栅极线分别与第一和第二鳍状有源区相交。 第一接触结构位于第一栅极线一侧的第一鳍状有源区，并与第一栅极线接触。 第二接触结构位于第二栅极线一侧的第二鳍状有源区上。 第一接触结构包括第一下触点，其包括金属硅化物和第一下触点上的第一上触点。 第二接触结构包括第二下触点，其包括金属硅化物和在第二下触点上的第二上触点。

    INTEGRATED CIRCUIT DEVICES INCLUDING FIN ACTIVE AREAS WITH DIFFERENT SHAPES
    7.
    发明申请
    INTEGRATED CIRCUIT DEVICES INCLUDING FIN ACTIVE AREAS WITH DIFFERENT SHAPES 有权
    集成电路设备，包括具有不同形状的FIN活动区域

    公开(公告)号：US20160260715A1

    公开(公告)日：2016-09-08

    申请号：US15015632

    申请日：2016-02-04

    申请人： Jae-yup Chung

    发明人： Jae-yup Chung

    IPC分类号： H01L27/088 ,  H01L29/10

    CPC分类号： H01L27/0886 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/1095 ,  H01L29/66818 ,  H01L29/785 ,  H01L29/7854

    摘要： An integrated circuit device can include a substrate having a first area and a second area and a pair of first fin-shaped active areas each having a first shape protruding from the first area in a first direction, adjacent to each other, and extending in a straight line. A fin separation insulating film can be between the pair of first fin-shaped active areas in the first area and a second fin-shaped active area can protrude from the second area in the first direction and have a second shape that is different from the first shape, wherein respective widths of each of the pair of first fin-shaped active areas are less than a corresponding width of the second fin-shaped active area.

    摘要翻译： 集成电路器件可以包括具有第一区域和第二区域的衬底和一对第一鳍状有源区域，每个第一鳍状有源区域具有在第一方向上彼此相邻地从第一区域突出的第一形状，并且在 直线。 鳍分离绝缘膜可以位于第一区域中的一对第一鳍状有源区域之间，第二鳍状有源区域可以从第一方向上的第二区域突出，并且具有与第一区域不同的第二形状 形状，其中所述一对第一鳍状有源区域中的每一个的相应宽度小于所述第二鳍状有源区域的对应宽度。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160163877A1

    公开(公告)日：2016-06-09

    申请号：US14953769

    申请日：2015-11-30

    申请人： Jae-Yup Chung ,  Hee-Soo Kang ,  Hee-Don Jeong ,  Se-Wan Park

    发明人： Jae-Yup Chung ,  Hee-Soo Kang ,  Hee-Don Jeong ,  Se-Wan Park

    IPC分类号： H01L29/786

    CPC分类号： H01L29/7848 ,  H01L27/0886 ,  H01L29/785

    摘要： A semiconductor device includes a first multi-channel active pattern, a field insulation layer disposed on the first multi-channel active pattern and including a first region and a second region, the first region having a top surface protruding from a top surface of the second region to a top surface of the first multi-channel active pattern, a first gate electrode crossing the first multi-channel active pattern, the first gate electrode being disposed on the field insulation layer, and a first source or drain disposed between the first gate electrode and the first region of the field insulation layer and including a first facet, the first facet being disposed adjacent to the first region of the field insulation layer at a point lower than the top surface of the first multi-channel active pattern.

    摘要翻译： 半导体器件包括第一多通道有源图案，设置在第一多通道有源图案上并包括第一区域和第二区域的场绝缘层，第一区域具有从第二多通道有源图案的顶表面突出的顶表面 区域到第一多通道有源图案的顶表面，与第一多通道有源图案交叉的第一栅电极，设置在场绝缘层上的第一栅极电极和设置在第一栅极之间的第一栅极或漏极 电极和场绝缘层的第一区域并且包括第一小面，第一面在比第一多通道活性图案的顶表面低的点处邻近场绝缘层的第一区域设置。