NANO-HYBRID OF TARGETABLE SIRNA-LAYERED INORGANIC HYDROXIDE, MANUFACTURING METHOD THEREOF, AND PHARMACEUTICAL COMPOSITION FOR TREATING TUMOR COMPRISING THE NANO-HYBRID
    2.
    发明申请
    NANO-HYBRID OF TARGETABLE SIRNA-LAYERED INORGANIC HYDROXIDE, MANUFACTURING METHOD THEREOF, AND PHARMACEUTICAL COMPOSITION FOR TREATING TUMOR COMPRISING THE NANO-HYBRID 审中-公开
    纳米混合型SIRNA层状无机氢氧化物,其制造方法和药物组合物,用于治疗包含纳米混合物的肿瘤

    公开(公告)号:US20120220647A1

    公开(公告)日:2012-08-30

    申请号:US13496108

    申请日:2009-09-14

    IPC分类号: A61K31/7088 A61P35/00

    CPC分类号: A61K9/0019

    摘要: A nanohybrid of the potent gene therapeutic agent siRNA (small interfering RNA) and a target-specific layered inorganic hydroxide, a preparation method thereof, and a pharmaceutical composition for tumor treatment containing the target-specific, siRNA/layered inorganic hydroxide nanohybrid. The nanohybrid increases the in vivo stability of the siRNA, and a target-specific multifunctional ligand, which is bonded to the layered inorganic hydroxide and can bind specifically to a tumor, increases the efficiency of tumor-specific transfer of the siRNA such that the siRNA shows tumor therapeutic activity even at a relatively low dose. Thus, the nanohybrid will be widely useful for target-specific antitumor therapies.

    摘要翻译: 强力基因治疗剂siRNA(小干扰RNA)和靶特异性层状无机氢氧化物的纳米杂交体及其制备方法和含有目标特异性siRNA /层状无机氢氧化物纳米混合物的肿瘤治疗用药物组合物。 纳米混合物增加了siRNA的体内稳定性,并且与层状无机氢氧化物结合并可以特异性结合到肿瘤的靶特异性多功能配体增加了siRNA的肿瘤特异性转移的效率,使得siRNA 即使在相对低的剂量下也显示肿瘤治疗活性。 因此,纳米混合物将广泛用于靶特异性抗肿瘤治疗。

    SUBSTRATE SUPPORTS FOR SEMICONDUCTOR APPLICATIONS
    3.
    发明申请
    SUBSTRATE SUPPORTS FOR SEMICONDUCTOR APPLICATIONS 有权
    用于半导体应用的基板支持

    公开(公告)号:US20120141661A1

    公开(公告)日:2012-06-07

    申请号:US13117262

    申请日:2011-05-27

    IPC分类号: H02N13/00 B05D5/00 B05D5/12

    CPC分类号: H01L21/6833 H01L21/6831

    摘要: This invention relates to substrate supports, e.g., coated electrostatic chucks, having a dielectric multilayer formed thereon; dielectric multilayers that provide erosive and corrosive barrier protection in harsh environments such as plasma treating vessels used in semiconductor device manufacture; process chambers, e.g., deposition chambers, for processing substrates; methods for protecting substrate supports; and methods for producing substrate supports and electronic devices. The dielectric multilayer comprises (a) an undercoat dielectric layer comprising a metal oxide or metal nitride formed on a surface; and (b) a topcoat dielectric layer comprising a metal oxide formed on the undercoat dielectric layer. The topcoat dielectric layer has an aluminum oxide content of less than about 1 weight percent. The topcoat dielectric layer has a corrosion resistance and/or plasma erosion resistance greater than the corrosion resistance and/or plasma erosion resistance of the undercoat dielectric layer. The undercoat dielectric layer can have a resistivity greater than the resistivity of the topcoat dielectric layer. The topcoat dielectric layer can have a dielectric constant greater than the dielectric constant of the undercoat dielectric layer. The undercoat dielectric layer can have a porosity greater than the porosity of the topcoat dielectric layer. The invention is useful, for example, in the manufacture and protection of electrostatic chucks used in semiconductor device manufacture.

    摘要翻译: 本发明涉及其上形成有电介质多层的衬底支撑体,例如涂覆的静电吸盘; 在诸如半导体器件制造中使用的等离子体处理容器等恶劣环境中提供腐蚀性和腐蚀性屏障保护的电介质多层膜; 处理室,例如沉积室,用于处理衬底; 用于保护衬底支撑件的方法; 以及用于制造衬底支撑件和电子器件的方法。 电介质层包括(a)在表面上形成的包含金属氧化物或金属氮化物的底涂层介电层; 和(b)包含在底涂层介电层上形成的金属氧化物的面漆介电层。 面漆介电层的氧化铝含量小于约1重量%。 面漆介电层具有比底涂层电介质层的耐腐蚀性和/或耐等离子体侵蚀性更强的耐腐蚀性和/或等离子体侵蚀性。 底涂层介电层的电阻率可以大于外涂层电介质层的电阻率。 面漆介电层的介电常数可以大于底涂层介电层的介电常数。 底涂层介电层的孔隙率可以大于顶涂层介电层的孔隙率。 本发明在例如半导体器件制造中使用的静电卡盘的制造和保护中是有用的。

    Substrate supports for semiconductor applications
    6.
    发明授权
    Substrate supports for semiconductor applications 有权
    基板支持半导体应用

    公开(公告)号:US08619406B2

    公开(公告)日:2013-12-31

    申请号:US13117262

    申请日:2011-05-27

    IPC分类号: H01T23/00

    CPC分类号: H01L21/6833 H01L21/6831

    摘要: This invention relates to substrate supports, e.g., coated electrostatic chucks, having a dielectric multilayer formed thereon; dielectric multilayers that provide erosive and corrosive barrier protection in harsh environments such as plasma treating vessels used in semiconductor device manufacture; process chambers, e.g., deposition chambers, for processing substrates; methods for protecting substrate supports; and methods for producing substrate supports and electronic devices. The dielectric multilayer comprises (a) an undercoat dielectric layer comprising a metal oxide or metal nitride formed on a surface; and (b) a topcoat dielectric layer comprising a metal oxide formed on the undercoat dielectric layer. The topcoat dielectric layer has an aluminum oxide content of less than about 1 weight percent. The topcoat dielectric layer has a corrosion resistance and/or plasma erosion resistance greater than the corrosion resistance and/or plasma erosion resistance of the undercoat dielectric layer. The undercoat dielectric layer can have a resistivity greater than the resistivity of the topcoat dielectric layer. The topcoat dielectric layer can have a dielectric constant greater than the dielectric constant of the undercoat dielectric layer. The undercoat dielectric layer can have a porosity greater than the porosity of the topcoat dielectric layer. The invention is useful, for example, in the manufacture and protection of electrostatic chucks used in semiconductor device manufacture.

    摘要翻译: 本发明涉及其上形成有电介质多层的衬底支撑体,例如涂覆的静电吸盘; 在诸如半导体器件制造中使用的等离子体处理容器等恶劣环境中提供腐蚀性和腐蚀性屏障保护的电介质多层膜; 处理室,例如沉积室,用于处理衬底; 用于保护衬底支撑件的方法; 以及用于制造衬底支撑件和电子器件的方法。 电介质层包括(a)在表面上形成的包含金属氧化物或金属氮化物的底涂层介电层; 和(b)包含在底涂层介电层上形成的金属氧化物的面漆介电层。 面漆介电层的氧化铝含量小于约1重量%。 面漆介电层具有比底涂层电介质层的耐腐蚀性和/或耐等离子体侵蚀性更强的耐腐蚀性和/或等离子体侵蚀性。 底涂层介电层的电阻率可以大于外涂层电介质层的电阻率。 面漆介电层的介电常数可以大于底涂层介电层的介电常数。 底涂层介电层的孔隙率可以大于顶涂层介电层的孔隙率。 本发明在例如半导体器件制造中使用的静电卡盘的制造和保护中是有用的。