Signal Termination Scheme for High Speed Memory Modules
    1.
    发明申请
    Signal Termination Scheme for High Speed Memory Modules 有权
    高速内存模块的信号终止方案

    公开(公告)号:US20100299468A1

    公开(公告)日:2010-11-25

    申请号:US12469694

    申请日:2009-05-21

    IPC分类号: G06F13/00

    摘要: A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.

    摘要翻译: 存储器件耦合到数据输入/输出(I / O)总线的一行子集。 存储器件包括一个片上有源终端电路,用于以选择的阻抗为多个可选阻抗之一来终止数据I / O总线的线路子集; 终端值寄存器耦合到片上有源终端电路,用于存储表示所选阻抗的值; 以及终端值设置电路,其耦合到终止值寄存器,用于将表示所选阻抗的值设置在终止值寄存器中。

    Pulse width driving method using multiple pulse
    2.
    发明申请
    Pulse width driving method using multiple pulse 有权
    脉冲宽度驱动方式采用多脉冲

    公开(公告)号:US20070296663A1

    公开(公告)日:2007-12-27

    申请号:US11809417

    申请日:2007-06-01

    IPC分类号: G09G3/36

    摘要: A method, device and computer program are detailed for modulating write light. For a plurality of pixel locations of an electro-optic layer of an optical write valve and across each of a plurality of consecutive frames, a set of pixel data bits is modulated across a first and a second pulse width period of the frame. The first and second pulse width periods, and adjacent pulse periods of sequential frames, are separated from one another by a pulse-off period that is at least equal to a response time of the electro-optic layer during which no bits are modulated. Separately in each frame, write light is output from each of the plurality of pixel locations according to the modulated pixel data bits in the frame. In an embodiment, the set of pixel data bits are modulated by applying a voltage at a pixel location of the electro-optic layer in synchronism with illuminating a light source that illuminates that pixel location.

    摘要翻译: 详细的方法,设备和计算机程序用于调制写入光。 对于光学写入阀的电光层并跨越多个连续帧中的每一个的多个像素位置,在帧的第一和第二脉冲宽度周期上调制一组像素数据位。 连续帧的第一和第二脉冲宽度周期和相邻的脉冲周期通过至少等于电光层在不调整位的响应时间的脉冲关闭周期彼此分离。 在每个帧中单独地,根据帧中的调制像素数据位,从多个像素位置中的每一个输出写入光。 在一个实施例中,通过在照射该像素位置的光源同步地施加电光层的像素位置处的电压来调制像素数据位集合。

    Pixel circuit to electrode translation
    6.
    发明申请
    Pixel circuit to electrode translation 有权
    像素电路到电极平移

    公开(公告)号:US20070247695A1

    公开(公告)日:2007-10-25

    申请号:US11350706

    申请日:2006-02-09

    IPC分类号: G02F1/03 G02F1/07

    摘要: A spatial light modulator has an array of elements organized into element rows and element columns and an array of electrodes organized into electrode rows and electrode columns to activate the array of elements. The modulator has pixel circuitry organized into circuit rows and circuit columns with the pixel circuitry being electrically coupled to the array of electrodes, such that there is at least one translation of either circuits in a column to electrodes in a row or circuits in a row to electrodes in a column.

    摘要翻译: 空间光调制器具有被组织成元件行和元件列的元件阵列以及组织成电极列和电极列的电极阵列以激活元件阵列。 调制器具有组织成电路行和电路列的像素电路,其中像素电路电耦合到电极阵列,使得在列中的任一电路至少一行到一行中的电极或一行中的电路至少 柱中的电极。

    Signal termination scheme for high speed memory modules
    7.
    发明授权
    Signal termination scheme for high speed memory modules 有权
    高速内存模块的信号终止方案

    公开(公告)号:US07843213B1

    公开(公告)日:2010-11-30

    申请号:US12469694

    申请日:2009-05-21

    IPC分类号: H03K17/16 H03K19/003

    摘要: A memory device is coupled to a subset of lines of a data input/output (I/O) bus. The memory device includes an on-die active termination circuit for terminating the subset of lines of the data I/O bus with a selected impedance being one of a plurality of selectable impedances; a termination value register being coupled to the on-die active termination circuit for storing a value representing the selected impedance; and a termination value setting circuit being coupled to the termination value register, for setting the value representing the selected impedance in the termination value register.

    摘要翻译: 存储器件耦合到数据输入/输出(I / O)总线的一行子集。 存储器件包括一个片上有源终端电路,用于以选择的阻抗为多个可选阻抗之一来终止数据I / O总线的线路子集; 终端值寄存器耦合到片上有源终端电路,用于存储表示所选阻抗的值; 以及终端值设置电路,其耦合到终止值寄存器,用于将表示所选阻抗的值设置在终止值寄存器中。

    ACTIVE-MATRIX LIGHT EMITTING DISPLAY AND METHOD FOR OBTAINING THRESHOLD VOLTAGE COMPENSATION FOR SAME
    10.
    发明申请
    ACTIVE-MATRIX LIGHT EMITTING DISPLAY AND METHOD FOR OBTAINING THRESHOLD VOLTAGE COMPENSATION FOR SAME 有权
    主动矩阵发光显示器和用于获得阈值电压补偿的方法

    公开(公告)号:US20050067970A1

    公开(公告)日:2005-03-31

    申请号:US10672373

    申请日:2003-09-26

    IPC分类号: G09G3/32 G09G3/10

    摘要: An active matrix display includes a plurality of pixels arranged in an array, a first transistor and a second transistor associated with each pixel, the first and second transistors positioned within the array for controlling current flow through each pixel, a light emitting diode associated with each pixel; and a storage capacitor associated with each pixel, wherein, during a time period for establishment of a threshold voltage on the storage capacitor for the first transistor, a voltage equal to the sum of the threshold voltage and a voltage for compensating for turnoff of the second transistor is established on the storage. capacitor.

    摘要翻译: 有源矩阵显示器包括排列成阵列的多个像素,与每个像素相关联的第一晶体管和第二晶体管,位于阵列内的第一和第二晶体管用于控制每个像素的电流,与每个像素相关联的发光二极管 像素 以及与每个像素相关联的存储电容器,其中,在用于在所述第一晶体管的存储电容器上建立阈值电压的时间段期间,将等于所述阈值电压和用于补偿所述第二晶体管的截止电压的电压之和的电压 在存储器上建立晶体管。 电容器。