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    Process Monitor for Monitoring an Integrated Circuit Chip
    1.
    发明申请
    Process Monitor for Monitoring an Integrated Circuit Chip 有权
    用于监控集成电路芯片的过程监视器

    公开(公告)号：US20110284840A1

    公开(公告)日：2011-11-24

    申请号：US12951877

    申请日：2010-11-22

    Applicant: Lawrence M. Burns ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    Inventor： Lawrence M. Burns ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    IPC: H01L23/58

    CPC classification number: H01L22/20 ,  G01R31/2607 ,  G01R31/30 ,  G01R31/31723 ,  H03F3/211 ,  H04N5/4446 ,  H04N5/52 ,  H04N7/102

    Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

    Abstract translation: 一种用于监控集成电路（IC）芯片的系统或装置，包括：感测电路，其至少部分地构造在IC芯片上并且被配置为产生一个或多个感测信号，每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块，被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号，每一个表示所述感测信号中相应的一个感测信号。 控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

    Process Monitor for Monitoring an Integrated Circuit Chip
    2.
    发明申请
    Process Monitor for Monitoring an Integrated Circuit Chip 有权
    用于监控集成电路芯片的过程监视器

    公开(公告)号：US20090085597A1

    公开(公告)日：2009-04-02

    申请号：US12261833

    申请日：2008-10-30

    Applicant: Lawrence M. Burns ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    Inventor： Lawrence M. Burns ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    IPC: G01R31/26

    CPC classification number: H01L22/20 ,  G01R31/2607 ,  G01R31/30 ,  G01R31/31723 ,  H03F3/211 ,  H04N5/4446 ,  H04N5/52 ,  H04N7/102

    Abstract: A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

    Abstract translation: 用于监控集成电路（IC）芯片的系统或装置包括：感测电路，至少部分地构造在IC芯片上并被配置为产生一个或多个感测信号，每个感测信号指示IC芯片的相应的与处理有关的电路参数; 以及数字转换器模块，被配置为响应于所述一个或多个感测信号产生一个或多个数字化信号，每一个表示所述感测信号中相应的一个感测信号。 控制器被配置为基于一个或多个数字化信号来确定一个或多个处理相关电路参数的值。

    Integrated Spiral Inductor
    5.
    发明申请
    Integrated Spiral Inductor 有权
    集成螺旋电感

    公开(公告)号：US20100245012A1

    公开(公告)日：2010-09-30

    申请号：US12731828

    申请日：2010-03-25

    Applicant: James Y.C. Chang

    Inventor： James Y.C. Chang

    IPC: H01F5/00

    CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L7/10 ,  H01L2924/00

    Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors with shields to increase circuit Q. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.

    Abstract translation: 描述了基本上在单个CMOS集成电路上实现的具有信道选择和图像抑制的集成接收机。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 频率转换电路有利地使用集成到衬底上的LC滤波器与图像抑制混合器结合，以提供足够的图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.使用本地振荡器调谐滤波器以调整替代滤波器，以及在滤波器组件值期间频率缩放至正被调谐的滤波器的滤波器。 结合滤波，频率规划提供了额外的镜像抑制。 片上本地振荡器信号产生方法的有利选择是通过PLL带外本地振荡和通过频带本地振荡器的直接合成。 PLL中的VCO使用控制电路居中，使调谐电容范围居中。 差分晶体振荡器有利地用作频率参考。 差分信号传输有利地用于整个接收机。 ESD保护由保护信号完整性的焊盘环和ESD钳位结构提供。 还提供每个引脚上的分流器，以放电ESD积聚。 分流器利用栅极升压结构来提供足够的小信号RF性能和最小的寄生负载。

    Process Monitor for Monitoring and Compensating Circuit Performance
    6.
    发明申请
    Process Monitor for Monitoring and Compensating Circuit Performance 有权
    监控和补偿电路性能的过程监控

    公开(公告)号：US20080265929A1

    公开(公告)日：2008-10-30

    申请号：US12110229

    申请日：2008-04-25

    Applicant: Lawrence M. BURNS ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    Inventor： Lawrence M. BURNS ,  Leonard Dauphinee ,  Ramon A. Gomez ,  James Y.C. Chang

    IPC: G01R31/02

    CPC classification number: H01L22/20 ,  G01R31/2607 ,  G01R31/30 ,  G01R31/31723 ,  H03F3/211 ,  H04N5/4446 ,  H04N5/52 ,  H04N7/102

    Abstract: A method and system for monitoring and compensating the performance of an operational circuit is provided. The system includes one or more integrated circuit chips and a controller. Each integrated circuit chip includes one or more operational circuits, each operational circuit having at least one controllable circuit parameter. Each integrated circuit chip also includes a process monitor module at least partially constructed thereon. The controller is coupled to each process monitor module and to each operational circuit. The controller includes logic for evaluating the performance of an operational circuit based on data obtained from process monitor module and operational circuit related data stored in a memory. Based on the evaluation, the controller determines whether any deviations from desired or optimal performance of the circuit exist. If deviations exist, the controller generates a control signal to initiate adjustments to the operational circuit to compensate for the deviations.

    Abstract translation: 提供了一种用于监测和补偿操作电路的性能的方法和系统。 该系统包括一个或多个集成电路芯片和控制器。 每个集成电路芯片包括一个或多个操作电路，每个操作电路具有至少一个可控电路参数。 每个集成电路芯片还包括至少部分地构建在其上的过程监控模块。 控制器耦合到每个过程监控模块和每个操作电路。 控制器包括用于基于从存储在存储器中的过程监视模块和操作电路相关数据获得的数据来评估操作电路的性能的逻辑。 基于评估，控制器确定是否存在与电路的期望或最佳性能的任何偏差。 如果存在偏差，则控制器产生控制信号以启动对运算电路的调整以补偿偏差。

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