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公开(公告)号：US08461670B2
公开(公告)日：2013-06-11
申请号：US12827980
申请日：2010-06-30
IPC分类号： H01L23/495 , H01L23/48 , H01L21/50
CPC分类号： H01L23/49537 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49575 , H01L24/04 , H01L24/06 , H01L24/32 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/32245 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/48091 , H01L2224/48137 , H01L2224/48157 , H01L2224/48247 , H01L2224/49111 , H01L2224/49171 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2924/00014 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15747 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099 , H01L2224/84
摘要： A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component is configured to permit the determination of circuit parameters. A high side FET has a gate terminal coupled to an output terminal of a high side gate drive circuit, a drain terminal coupled for receiving an input voltage, and a source terminal coupled to the drain terminal of a low side FET. The gate terminal of the low side FET is coupled to the output terminal of low side drive circuit and the source terminal of the low side FET is coupled for receiving a source of operating potential. The high side gate drive circuit has a bias terminal coupled for receiving a floating potential where the bias terminal is electrically isolated or decoupled from the commonly connected source and drain terminals of the high side FET and the low side FET, respectively.
摘要翻译： 一种半导体元件和半导体元件的制造方法，其中，所述半导体元件被配置为允许确定电路参数。 高侧FET具有耦合到高侧栅极驱动电路的输出端子的栅极端子，耦合用于接收输入电压的漏极端子和耦合到低侧FET的漏极端子的源极端子。 低侧FET的栅极端子耦合到低侧驱动电路的输出端子，并且低侧FET的源极端子被耦合以接收工作电位源。 高侧栅极驱动电路具有耦合用于接收浮置电位的偏置端子，其中偏置端子分别与高侧FET和低侧FET的共同连接的源极和漏极端子电隔离或去耦合。
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公开(公告)号：US20110298115A1
公开(公告)日：2011-12-08
申请号：US12827980
申请日：2010-06-30
IPC分类号： H01L23/495 , H01L23/48 , H01L21/50
CPC分类号： H01L23/49537 , H01L23/4952 , H01L23/49524 , H01L23/49541 , H01L23/49575 , H01L24/04 , H01L24/06 , H01L24/32 , H01L24/40 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/32245 , H01L2224/40095 , H01L2224/40245 , H01L2224/40247 , H01L2224/48091 , H01L2224/48137 , H01L2224/48157 , H01L2224/48247 , H01L2224/49111 , H01L2224/49171 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2924/00014 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15747 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/37099 , H01L2224/84
摘要： A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component is configured to permit the determination of circuit parameters. A high side FET has a gate terminal coupled to an output terminal of a high side gate drive circuit, a drain terminal coupled for receiving an input voltage, and a source terminal coupled to the drain terminal of a low side FET. The gate terminal of the low side FET is coupled to the output terminal of low side drive circuit and the source terminal of the low side FET is coupled for receiving a source of operating potential. The high side gate drive circuit has a bias terminal coupled for receiving a floating potential where the bias terminal is electrically isolated or decoupled from the commonly connected source and drain terminals of the high side FET and the low side FET, respectively.
摘要翻译： 一种半导体元件和半导体元件的制造方法，其中，所述半导体元件被配置为允许确定电路参数。 高侧FET具有耦合到高侧栅极驱动电路的输出端子的栅极端子，耦合用于接收输入电压的漏极端子和耦合到低侧FET的漏极端子的源极端子。 低侧FET的栅极端子耦合到低侧驱动电路的输出端子，并且低侧FET的源极端子被耦合以接收工作电位源。 高侧栅极驱动电路具有耦合用于接收浮置电位的偏置端子，其中偏置端子分别与高侧FET和低侧FET的共同连接的源极和漏极端子电隔离或去耦合。
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