公开(公告)号：US20230019017A1

公开(公告)日：2023-01-19

申请号：US17375210

申请日：2021-07-14

Applicant: AURELIUS L. GRANINGER ,  AARON A. PESETSKI ,  JOEL D. STRAND

Inventor： AURELIUS L. GRANINGER ,  AARON A. PESETSKI ,  JOEL D. STRAND

IPC: H03K17/92 ,  H01F7/06

Abstract: A superconducting AC switch system includes a switch network configuration comprising a Josephson junction (JJ) coupled to a transmission line having a transmission line impedance, and a magnetic field generator that is configured to switch from inducing a magnetic field in a plane of the JJ, and providing no magnetic field in the plane of the JJ. An AC input signal applied at an input of the switch network configuration is passed through to an output of the switch network configuration in a first magnetic state, and substantially reflected back to the input of the switch network configuration in a second magnetic state. The first magnetic state is one of inducing and not inducing a magnetic field in a plane of the JJ, and the second magnetic state is the other of inducing and not inducing a magnetic field in a plane of the JJ.

公开(公告)号：US20200220064A1

公开(公告)日：2020-07-09

申请号：US16241661

申请日：2019-01-07

Applicant: AURELIUS L. GRANINGER ,  JOEL D. STRAND ,  MICAH JOHN ATMAN STOUTIMORE ,  ZACHARY KYLE KEANE ,  JEFFREY DAVID HARTMAN ,  JUSTIN C. HACKLEY

Inventor： AURELIUS L. GRANINGER ,  JOEL D. STRAND ,  MICAH JOHN ATMAN STOUTIMORE ,  ZACHARY KYLE KEANE ,  JEFFREY DAVID HARTMAN ,  JUSTIN C. HACKLEY

IPC: H01L39/02 ,  H01L25/065 ,  H01L23/00 ,  H01L27/18 ,  H01L21/66 ,  G01R31/28

Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.

公开(公告)号：US10164606B1

公开(公告)日：2018-12-25

申请号：US15868416

申请日：2018-01-11

Applicant: Zachary Kyle Keane ,  Joel D. Strand ,  Ofer Naaman

Inventor： Zachary Kyle Keane ,  Joel D. Strand ,  Ofer Naaman

IPC: H03H11/04 ,  H03K19/0175 ,  H03K19/195 ,  H01L39/22

Abstract: A load-compensated tunable coupler leverages a cross-bar switch and simulated loads or ballasts to provide a tunable coupling between two quantum objects that can be selectively coupled or decoupled without changing their resonant frequencies.

公开(公告)号：US20180342663A1

公开(公告)日：2018-11-29

申请号：US16037539

申请日：2018-07-17

Applicant: DAVID GEORGE FERGUSON ,  ANTHONY JOSEPH PRZYBYSZ ,  JOEL D. STRAND

Inventor： DAVID GEORGE FERGUSON ,  ANTHONY JOSEPH PRZYBYSZ ,  JOEL D. STRAND

IPC: H01L39/02 ,  G06N99/00 ,  H03K19/195

Abstract: Systems and methods are provided for a ZZZ coupler. A first tunable coupler is coupled to the first qubit and tunable via a first control signal. A second tunable coupler is coupled to the first tunable coupler to direct a flux of the first qubit into a tuning loop of the second tunable coupler, such that when a first coupling strength associated with the first tunable coupler is non-zero, a second coupling strength, associated with the second tunable coupler, is a function of a second control signal applied to the second tunable coupler and a state of the first qubit. The second qubit and the third qubit are coupled to one another through the second tunable coupler, such that, when the second coupling strength is non-zero it is energetically favorable for the states of the first and second qubits to assume a specific relationship with respect to the Z-axis.

公开(公告)号：US09685935B2

公开(公告)日：2017-06-20

申请号：US14485129

申请日：2014-09-12

Applicant: Joel D. Strand ,  Aaron A. Pesetski

Inventor： Joel D. Strand ,  Aaron A. Pesetski

IPC: H03K3/38 ,  H03K3/012 ,  B82Y10/00 ,  H01L39/24 ,  G06N99/00

CPC classification number: H03K3/38 ,  B82Y10/00 ,  G06N99/002 ,  H01L39/2493 ,  H03K3/012

Abstract: Systems and methods are provided for a tunable transmon qubit. The qubit includes a first Josephson junction on a first path between a transmission line and a circuit ground and second and third Josephson junctions arranged in parallel with one another on a second path between the transmission line and the circuit ground to form a direct current superconducting quantum interference device (DC SQUID). The DC SQUID is in parallel with the first Josephson junction. A capacitor is arranged in parallel with the first Josephson junction and the DC SQUID on a third path between the transmission line and the circuit ground as to form, in combination with the first path, an outer loop of the tunable transmon qubit. A bias circuit is configured to provide a constant bias flux to one of the DC SQUID and the outer loop of the tunable transmon qubit.

公开(公告)号：US11616187B2

公开(公告)日：2023-03-28

申请号：US17168443

申请日：2021-02-05

Applicant: Aurelius L. Graninger ,  Joel D. Strand ,  Micah John Atman Stoutimore ,  Zachary Kyle Keane ,  Jeffrey David Hartman ,  Justin C. Hackley

Inventor： Aurelius L. Graninger ,  Joel D. Strand ,  Micah John Atman Stoutimore ,  Zachary Kyle Keane ,  Jeffrey David Hartman ,  Justin C. Hackley

IPC: H01L39/02 ,  G01R31/28 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L27/18 ,  H01L39/08 ,  H01L39/10 ,  H01L39/12 ,  H01L39/06 ,  H01L39/22

Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.

公开(公告)号：US11545288B2

公开(公告)日：2023-01-03

申请号：US16849595

申请日：2020-04-15

Applicant: Joel D. Strand

Inventor： Joel D. Strand

IPC: H01F6/00 ,  H01L27/18 ,  G06N10/00 ,  H01L39/22 ,  H01L39/02

Abstract: One example includes a superconducting current control system. The system includes an inductive coupler comprising a load inductor and a control inductor. The inductive coupler can be configured to inductively provide a control current from the control inductor to a superconducting circuit device based on a load current being provided through the load inductor. The system also includes a current control element comprising a superconducting quantum interference device (SQUID) array comprising a plurality of SQUIDs. The current control element can be coupled to the inductive coupler to control an amplitude of the load current through the load inductor, and thus to control an amplitude of the control current to the superconducting circuit device.

公开(公告)号：US11486910B1

公开(公告)日：2022-11-01

申请号：US17315492

申请日：2021-05-10

Applicant: Cody James Ballard ,  Andrew Hostetler Miklich ,  Micah John Atman Stoutimore ,  Robert Miller ,  Joel D. Strand ,  Kurt Pleim

Inventor： Cody James Ballard ,  Andrew Hostetler Miklich ,  Micah John Atman Stoutimore ,  Robert Miller ,  Joel D. Strand ,  Kurt Pleim

IPC: G01R19/14 ,  G01R15/18

Abstract: One example includes a flux switch system. The system includes an input stage configured to provide an interrogation pulse. The system also includes a plurality of flux loops configured to receive an input current. Each of the flux loops includes a Josephson junction configured to trigger to generate an output pulse in response to a first polarity of the input current and to not trigger to generate no output pulse in response to a second polarity of the input current opposite the first polarity. The system further includes an output stage configured to propagate the output pulse to an output of the flux switch system.

公开(公告)号：US20210257532A1

公开(公告)日：2021-08-19

申请号：US17168443

申请日：2021-02-05

Applicant: AURELIUS L. GRANINGER ,  JOEL D. STRAND ,  MICAH JOHN ATMAN STOUTIMORE ,  ZACHARY KYLE KEANE ,  JEFFREY DAVID HARTMAN ,  JUSTIN C. HACKLEY

Inventor： AURELIUS L. GRANINGER ,  JOEL D. STRAND ,  MICAH JOHN ATMAN STOUTIMORE ,  ZACHARY KYLE KEANE ,  JEFFREY DAVID HARTMAN ,  JUSTIN C. HACKLEY

IPC: H01L39/02 ,  G01R31/28 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L27/18 ,  H01L39/08 ,  H01L39/10 ,  H01L39/12 ,  H01L39/06 ,  H01L39/22

Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.

公开(公告)号：US10950778B2

公开(公告)日：2021-03-16

申请号：US16241661

申请日：2019-01-07

Applicant: Aurelius L. Graninger ,  Joel D. Strand ,  Micah John Atman Stoutimore ,  Zachary Kyle Keane ,  Jeffrey David Hartman ,  Justin C. Hackley

Inventor： Aurelius L. Graninger ,  Joel D. Strand ,  Micah John Atman Stoutimore ,  Zachary Kyle Keane ,  Jeffrey David Hartman ,  Justin C. Hackley

IPC: H01L29/06 ,  H01L39/02 ,  G01R31/28 ,  H01L21/66 ,  H01L23/00 ,  H01L25/065 ,  H01L27/18 ,  H01L39/08 ,  H01L39/10 ,  H01L39/12 ,  H01L39/06 ,  H01L39/22

Abstract: Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.