Superconductor-to-insulator devices

    公开(公告)号:US11832532B2

    公开(公告)日:2023-11-28

    申请号:US16798195

    申请日:2020-02-21

    申请人: PsiQuantum Corp.

    发明人: Faraz Najafi

    摘要: A device includes a superconductor layer and a piezoelectric layer positioned adjacent to the superconductor layer. The piezoelectric layer is configured to apply a first strain to the superconductor layer in response to receiving a first voltage that is below a predefined voltage threshold and to apply a second strain to the superconductor layer in response to receiving a second voltage that is above the predefined voltage threshold. While the device is maintained below a superconducting threshold temperature for the superconductor layer and is supplied with current below a superconducting threshold current for the superconductor layer, the superconductor layer is configured to 1) operate in a superconducting state when the piezoelectric layer applies the first strain to the superconductor layer and 2) operate in an insulating state when the piezoelectric layer applies the second strain to the superconductor layer.

    Integrated superconducting nanowire digital photon detector

    公开(公告)号:US11385099B1

    公开(公告)日:2022-07-12

    申请号:US16016149

    申请日:2018-06-22

    申请人: Hypres, Inc.

    摘要: Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.

    Superconducting Field-Programmable Gate Array

    公开(公告)号:US20210351778A1

    公开(公告)日:2021-11-11

    申请号:US17135861

    申请日:2020-12-28

    申请人: PsiQuantum Corp.

    摘要: A programmable circuit includes a superconducting component arranged in a multi-dimensional array of alternating narrow and wide portions. The programmable circuit further includes a plurality of heat sources, each heat source configured to selectively provide heat to a respective narrow portion sufficient to transition the respective narrow portion from a superconducting state to a non-superconducting state. The programmable circuit further includes a plurality of electrical terminals, each electrical terminal coupled to a respective wide portion of the multi-dimensional array.

    Use of selective hydrogen etching technique for building topological qubits

    公开(公告)号:US11081634B2

    公开(公告)日:2021-08-03

    申请号:US16024552

    申请日:2018-06-29

    摘要: Embodiments of a Majorana-based qubit are disclosed herein. The qubit is based on the formation of superconducting islands, some parts of which are topological (T) and some parts of which are non-topological. Also disclosed are example techniques for fabricating such qubits. In one embodiment, a semiconductor nanowire is grown, the semiconductor nanowire having a surface with an oxide layer. A dielectric insulator layer is deposited onto a portion of the oxide layer of the semiconductor nanowire, the portion being designed to operate as a non-topological segment in the quantum device. An etching process is performed on the oxide layer of the semiconductor nanowire that removes the oxide layer at the surface of the semiconductor nanowire but maintains the oxide layer in the portion having the deposited dielectric insulator layer. A superconductive layer is deposited on the surface of the semiconductor nanowire, including over the dielectric insulator layer.

    MAJORANA FERMION QUANTUM COMPUTING DEVICES WITH CHARGE SENSING FABRICATED WITH ION IMPLANT METHODS

    公开(公告)号:US20210143311A1

    公开(公告)日:2021-05-13

    申请号:US16680078

    申请日:2019-11-11

    IPC分类号: H01L39/10 H01L27/18

    摘要: A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. Using an etching process subsequent to the implanting, the sensing region and a portion of the device region of the superconductor layer adjacent to the isolation region are exposed. By depositing a first metal layer within the sensing region, a tunnel junction gate is formed. A reflectrometry wire comprising a second metal within the reflectrometry region is formed. A nanorod contact using the second metal within the portion of the device region outside the sensing region is formed.

    MAJORANA FERMION QUANTUM COMPUTING DEVICES FABRICATED WITH ION IMPLANT METHODS

    公开(公告)号:US20210143310A1

    公开(公告)日:2021-05-13

    申请号:US16680040

    申请日:2019-11-11

    IPC分类号: H01L39/10 H01L27/18 H01L39/24

    摘要: A quantum computing device is fabricated by forming, on a superconductor layer, a first resist pattern defining a device region and a sensing region within the device region. The superconductor layer within the sensing region is removed, exposing a region of an underlying semiconductor layer outside the device region. The exposed region of the semiconductor layer is implanted, forming an isolation region surrounding the device region. Using an etching process subsequent to the implanting, the sensing region and a portion of the device region of the superconductor layer adjacent to the isolation region are exposed. By depositing a first metal layer within the sensing region, a tunnel junction gate is formed. A sensing region gate is formed by coupling the semiconductor layer with a second metal layer. A nanorod contact using the second metal within the portion of the device region outside the sensing region is formed.

    Fabrication of a device
    7.
    发明授权

    公开(公告)号:US10978632B2

    公开(公告)日:2021-04-13

    申请号:US16252237

    申请日:2019-01-18

    IPC分类号: H01L39/24 H01L39/22 H01L39/10

    摘要: A method of fabricating a device, wherein the device comprises a plurality of lengths of material and at least one junction joining two or more of the lengths of material. In a masking phase, a mask is formed on an underlying layer of the device. The mask comprises a plurality of trenches exposing the underlying layer, each trench corresponding to one of the lengths of material. A respective section of two or more of the trenches either (a) narrow down, or (b) are separated by a discontinuity, at a position corresponding to the at least one junction. In a selective area growth phase, material is grown in the set of trenches to form the lengths of material on the underlying layer. The two or more lengths of material are joined at the at least one junction.

    Superconducting logic components
    8.
    发明授权

    公开(公告)号:US10972104B2

    公开(公告)日:2021-04-06

    申请号:US16473547

    申请日:2019-02-12

    申请人: PSIQUANTUM CORP.

    摘要: The various embodiments described herein include methods, devices, and systems for operating superconducting circuitry. In one aspect, a superconducting component includes: (1) a superconductor having a plurality of alternating narrow and wide portions, each wide portion having a corresponding terminal; and (2) a plurality of heat sources, each heat source thermally coupled to a corresponding narrow portion such that heat from the heat source is transmitted to the corresponding narrow portion; where the plurality of heat sources is electrically isolated from the superconductor.

    DETECTION SCHEME
    10.
    发明申请
    DETECTION SCHEME 审中-公开

    公开(公告)号:US20200272931A1

    公开(公告)日:2020-08-27

    申请号:US16735438

    申请日:2020-01-06

    IPC分类号: G06N10/00 H01L39/10 H01L39/12

    摘要: The present subject matter provides technical solutions for the technical problems facing quantum computing by improving the accuracy and precision of qubit readout. Technical solutions described herein improves the readout fidelity by reducing the ambiguity between the bright and dark states. In an embodiment, this includes transferring the qubit population that is in the dark quantum state to an auxiliary third state. The auxiliary third state remains dark and reduces the mixing between the logical bright and dark states. This process uses multiple laser pulses to ensure high fidelity population transfer, thus preserving the dark nature of the dark state. Improving readout fidelity of 171Yb+ qubits may improve fidelity by an order of magnitude, such as by improving readout fidelity from 99.9% to 99.99%. This improvement in detection fidelity may substantially increase the computational power of a quantum computer.