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公开(公告)号：US20230055589A1
公开(公告)日：2023-02-23
申请号：US17967778
申请日：2022-10-17
申请人： PsiQuantum Corp.
发明人： Faraz Najafi
摘要： An electronic device includes a substrate and a layer of superconducting material disposed over the substrate. The layer of superconducting material includes a first wire and a loop that is (1) distinct and separate from the first wire and (ii) capacitively coupled to the first wire while the loop and the first wire are in a superconducting state.
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公开(公告)号：US11437169B2
公开(公告)日：2022-09-06
申请号：US15757707
申请日：2016-09-06
发明人： Rock Kil Ko , Dong Woo Ha , Seog Whan Kim , Young Sik Jo
摘要： The present invention relates to a stacking structure of a superconducting wire. The present invention provides a superconducting wire in which a metal substrate, a buffer layer, a superconducting layer, and a stabilizing layer are stacked, the superconducting wire including: a plurality of wedges which penetrates through the superconducting layer and the buffer layer to connect the stabilizing layer and the metal substrate. According to the present invention, it is possible to provide the superconducting wire of which mechanical strength is improved to have high resistance against to deterioration or delamination. Further, the present invention may provide the superconducting wire which is self-protectable against a quench phenomenon. Further, the present invention may provide the superconducting wire which is suitable for application of a high magnetic field.
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公开(公告)号：US11201275B1
公开(公告)日：2021-12-14
申请号：US16897667
申请日：2020-06-10
摘要： A structure has a substrate, and a spring structure disposed on the substrate, the spring structure having an anchor portion disposed on the substrate, an elastic material having an intrinsic stress profile that biases a region of the elastic material to curl away from the substrate, and a superconductor film in electrical contact with a portion of the elastic material. A method of manufacturing superconductor structures includes depositing a release film on a substrate, forming a stack of films comprising an elastic material and a superconductor film, releasing a portion of the elastic material by selective removal of the release film so that portion lifts out of the substrate plane to form elastic springs. A method of manufacturing superconductor structures includes depositing a release film on a substrate, forming a stack of films comprising at least an elastic material, releasing a portion of the elastic material so that portion lifts out of a plane of the substrate to form elastic springs, and coating the elastic springs with a superconductor film.
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公开(公告)号：US20210384401A1
公开(公告)日：2021-12-09
申请号：US17405373
申请日：2021-08-18
申请人： Google LLC
摘要： A qubit coupling device includes: a dielectric substrate including a trench; a first superconductor layer on a surface of the dielectric substrate where an edge of the first superconductor layer extends along a first direction and at least a portion of the superconductor layer is in contact with the surface of the dielectric substrate, and where the superconductor layer is formed from a superconductor material exhibiting superconductor properties at or below a corresponding critical temperature; a length of the trench within the dielectric substrate is adjacent to and extends along an edge of the first superconductor layer in the first direction, and where the electric permittivity of the trench is less than the electric permittivity of the dielectric substrate.
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公开(公告)号：US20210384126A1
公开(公告)日：2021-12-09
申请号：US17408309
申请日：2021-08-20
申请人： PsiQuantum Corp
IPC分类号： H01L23/528 , H01L27/18 , H01L39/08
摘要： A superconducting circuit includes a first component having a first connection point. The first connection point has a first width. The superconducting circuit includes a second component having a second connection point. The second connection point has a second width that is larger than the first width. The superconducting circuit includes a superconducting connector shaped to reduce current crowding. The superconducting connector electrically connects the first connection point and the second connection point. The superconducting connector includes a first taper positioned adjacent the first connection point and having a non-linear shape and a second taper positioned adjacent the second connection point.
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公开(公告)号：US11101215B2
公开(公告)日：2021-08-24
申请号：US16575274
申请日：2019-09-18
申请人： PsiQuantum Corp.
IPC分类号： H01L23/528 , H01L39/08 , H01L27/18 , H01L23/532 , H01L39/12 , H01L39/10
摘要： The various embodiments described herein include methods, devices, and circuits for reducing or minimizing current crowding effects in manufactured superconductors. In some embodiments, a superconducting circuit includes: (1) a first component having a first connection point, the first connection point having a first width; (2) a second component having a second connection point, the second connection point having a second width that is larger than the first width; and (3) a connector electrically connecting the first connection point and the second connection point, the connector including: (a) a first taper having a first slope and a non-linear shape; (b) a second taper having a second slope; and (c) a connecting portion connecting the first taper to the second taper, the connecting portion having a third slope that is less than the first slope and less than the second slope.
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公开(公告)号：US11100419B2
公开(公告)日：2021-08-24
申请号：US16867601
申请日：2020-05-06
发明人： Jagadeesh S. Moodera , Patrick A. Lee , Peng Wei , Sujit Manna
摘要： Under certain conditions, a fermion in a superconductor can separate in space into two parts known as Majorana zero modes, which are immune to decoherence from local noise sources and are attractive building blocks for quantum computers. Here we disclose a metal-based heterostructure platform to produce these Majorana zero modes which utilizes the surface states of certain metals in combination with a ferromagnetic insulator and a superconductor. This platform has the advantage of having a robust energy scale and the possibility of realizing complex circuit designs using lithographic methods. The Majorana zero modes are interrogated using planar tunnel junctions and electrostatic gates to selectively tunnel into designated pairs of Majorana zero modes. We give example of qubit designs and circuits that are particularly suitable for the metal-based heterostructures.
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公开(公告)号：US20200350483A1
公开(公告)日：2020-11-05
申请号：US16547471
申请日：2019-08-21
申请人： PsiQuantum Corp.
发明人： Faraz Najafi , Syrus Ziai
摘要： An electronic device (e.g., a diode) is provided that includes a substrate and a patterned layer of superconducting material disposed over the substrate. The patterned layer forms a first electrode, a second electrode, and a loop coupling the first electrode with the second electrode by a first channel and a second channel. The first channel and the second channel have different minimum widths. For a range of current magnitudes, when a magnetic field is applied to the patterned layer of superconducting material, the conductance from the first electrode to the second electrode is greater than the conductance from the second electrode to the first electrode.
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公开(公告)号：US20200287118A1
公开(公告)日：2020-09-10
申请号：US16296007
申请日：2019-03-07
摘要： Superconducting integrated circuit layouts are proofed against the detrimental effects of stray flux by designing and fabricating them to have one or more ground planes patterned in the x-y plane with a regular grid of low-aspect-ratio flux-trapping voids. The ground plane(s) can be globally patterned with such voids and thousands or more superconducting circuit devices and wires can thereafter be laid out so as not to intersect or come so close to the voids that the trapped flux would induce supercurrents in them, thus preventing undesirable coupling of flux into circuit elements. Sandwiching a wire layer between patterned ground planes permits wires to be laid out even closer to the voids. Voids of successively smaller maximum dimension can be concentrically stacked in pyramidal fashion in multiple ground plane layers having different superconductor transition temperatures, increasing the x-y area available for device placement and wire-up.
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公开(公告)号：US10665635B1
公开(公告)日：2020-05-26
申请号：US16395061
申请日：2019-04-25
IPC分类号： H01L27/18 , H01L39/24 , H03K19/195 , G06N10/00 , H01L39/02 , H01L39/22 , H01L39/12 , H01L39/08
摘要： A tunable qubit device includes a tunable qubit, the tunable qubit including a superconducting quantum interference device (SQUID) loop. The tunable qubit device further includes a superconducting loop inductively coupled to the SQUID loop, and a flux bias line inductively coupled to the superconducting loop. The superconducting loop includes a superconducting material having a critical temperature that is a lower temperature than a critical temperature of any superconducting material of the tunable qubit. In operation, the superconducting loop provides a persistent bias to the tunable qubit.
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