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12 条记录 (耗时 0.014 秒)

    Method of forming a semiconductor isolation trench
    1.
    发明授权
    Method of forming a semiconductor isolation trench 有权
    形成半导体隔离沟槽的方法

    公开(公告)号：US07687370B2

    公开(公告)日：2010-03-30

    申请号：US11342102

    申请日：2006-01-27

    申请人： Toni D. Van Gompel ,  John J. Hackenberg ,  Rode R. Mora ,  Suresh Venkatesan

    发明人： Toni D. Van Gompel ,  John J. Hackenberg ,  Rode R. Mora ,  Suresh Venkatesan

    IPC分类号： H01L21/76 ,  H01L21/311 ,  H01L21/302

    CPC分类号： H01L21/76224 ,  Y10S438/911

    摘要： A method for forming a semiconductor isolation trench includes forming a pad oxide layer over a substrate and forming a barrier layer over the substrate. A masking layer is formed over the barrier layer and is patterned to form at least one opening in the masking layer. At least a part of the barrier layer and at least a part of the pad oxide layer are etched through the at least one opening resulting in a trench pad oxide layer. Etching of the trench pad oxide layer stops substantially at a top surface of the substrate within the isolation trench. An oxide layer is grown by diffusion on at least the top surface of the substrate corresponding to the at least one isolation trench. The method further includes etching the oxide layer and at least a portion of the substrate to form at least one isolation trench opening.

    摘要翻译： 用于形成半导体隔离沟槽的方法包括在衬底上形成衬垫氧化物层，并在衬底上形成阻挡层。 掩模层形成在阻挡层之上，并被图案化以在掩模层中形成至少一个开口。 阻挡层的至少一部分和衬垫氧化物层的至少一部分被蚀刻穿过至少一个开口，导致沟槽衬垫氧化物层。 沟槽衬垫氧化物层的蚀刻基本上在隔离沟槽内的衬底顶表面上停止。 氧化物层通过扩散至少对应于至少一个隔离沟槽的衬底的顶表面生长。 所述方法还包括蚀刻所述氧化物层和所述衬底的至少一部分以形成至少一个隔离沟槽开口。

    Particulate removal from an electrostatic chuck
    2.
    发明授权
    Particulate removal from an electrostatic chuck 失效
    从静电吸盘去除颗粒

    公开(公告)号：US07097714B2

    公开(公告)日：2006-08-29

    申请号：US10740171

    申请日：2003-12-18

    申请人： John J. Hackenberg

    发明人： John J. Hackenberg

    IPC分类号： B08B5/04

    CPC分类号： H01L21/67028 ,  B08B5/02 ,  H01L21/6831

    摘要： The cleaning of particles from an electrostatic chuck. In one embodiment, a method of cleaning an electrostatic chuck in a processing chamber is disclosed. The method comprises directing a flow of gas across the electrostatic chuck to dislodge particles from the electrostatic chuck and removing the flow of gas and particles through an exhaust port in the processing chamber. In this embodiment, the vacuum integrity of the chamber is not compromised during the cleaning of the electrostatic chuck.

    摘要翻译： 从静电吸盘清洁颗粒。 在一个实施例中，公开了一种在处理室中清洁静电卡盘的方法。 该方法包括引导气流穿过静电吸盘以从静电吸盘排出颗粒，并通过处理室中的排气口去除气体和颗粒的流动。 在该实施例中，在清洁静电卡盘期间腔室的真空完整性不受影响。

    Device and method for improving corrosion resistance and etch tool integrity in dry metal etching
    3.
    发明授权
    Device and method for improving corrosion resistance and etch tool integrity in dry metal etching 失效
    在干金属蚀刻中提高耐蚀性和蚀刻工具完整性的装置和方法

    公开(公告)号：US5830279A

    公开(公告)日：1998-11-03

    申请号：US536257

    申请日：1995-09-29

    申请人： John J. Hackenberg

    发明人： John J. Hackenberg

    IPC分类号： B08B7/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/3213 ,  B08B6/00 ,  B44C1/22

    CPC分类号： H01L21/02071 ,  B08B7/0071 ,  H01L21/67028 ,  H01L21/67115

    摘要： A device and method for removing contaminants from semiconductor wafers and from the interior of wafer processing chambers in which the temperature inside the chambers is raised to sufficiently high levels for short time periods. In a wafer etching chamber, heat cleaning is performed after wafer removal and lessens the required frequency of other cleaning methods and in doing so reduces the time the chamber is unavailable. In a mask removal chamber, heat cleaning is performed with the wafer in the chamber and while still under vacuum conditions, thereby driving contaminants off of both the wafer and the chamber interior. The wafer cleaning is performed prior to exposure to atmospheric water vapor which can initiate corrosion.

    摘要翻译： 一种用于从半导体晶片和晶片处理室内部去除污染物的装置和方法，其中室内温度在短时间内升高到足够高的水平。 在晶片蚀刻室中，在晶片去除之后进行热清洗，并减少所需的其它清洁方法的频率，并且这样做减少了室不可用的时间。 在掩模去除室中，用晶片在室中进行热清洗，同时在真空条件下进行热清洗，从而将杂质从晶片和室内驱动。 在暴露于可能引发腐蚀的大气水汽之前进行晶片清洗。

    Method of forming a semiconductor layer
    6.
    发明授权
    Method of forming a semiconductor layer 有权
    形成半导体层的方法

    公开(公告)号：US07972922B2

    公开(公告)日：2011-07-05

    申请号：US12275659

    申请日：2008-11-21

    申请人： Hunter J. Martinez ,  John J. Hackenberg ,  Jill Hildreth ,  Ross E. Noble

    发明人： Hunter J. Martinez ,  John J. Hackenberg ,  Jill Hildreth ,  Ross E. Noble

    IPC分类号： H01L21/8238

    CPC分类号： H01L31/1804 ,  H01L31/103 ,  H01L31/1864 ,  Y02E10/547 ,  Y02P70/521

    摘要： A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. The silicon shape has a top surface that is exposed. The ozonated water is applied to the top surface and causes formation of a first oxide layer on the top surface. The germanium is grown on the top surface.

    摘要翻译： 一种形成半导体层的方法，其在一个实施例中是光电检测器的一部分，包括形成硅形状，施加臭氧水，在低于600摄氏度的温度下去除第一氧化物层，以及外延生长锗。 硅形状具有暴露的顶面。 臭氧水被施加到顶部表面并且在顶部表面上形成第一氧化物层。 锗在顶面生长。

    Power trench transistor device source region formation using silicon spacer
    9.
    发明授权
    Power trench transistor device source region formation using silicon spacer 失效
    使用硅衬垫的功率沟槽晶体管器件源区域形成

    公开(公告)号：US06455379B2

    公开(公告)日：2002-09-24

    申请号：US09799845

    申请日：2001-03-06

    申请人： Linda S. Brush ,  Jun Zeng ,  John J. Hackenberg ,  Jack H. Linn ,  George V. Rouse

    发明人： Linda S. Brush ,  Jun Zeng ,  John J. Hackenberg ,  Jack H. Linn ,  George V. Rouse

    IPC分类号： H01L21336

    CPC分类号： H01L29/7802 ,  H01L29/41766 ,  H01L29/66348 ,  H01L29/66378 ,  H01L29/66545 ,  H01L29/7397 ,  H01L29/749 ,  H01L29/7813

    摘要： A power trench MOS-gated transistor is constructed with a buried gate to source dielectric inside a gate trench region. In the innovative device, a thick oxide (grown or deposited) is used to define the height of the trench walls. A body region is initially formed by selective epitaxial growth and etch back. Source regions are formed also by selective epitaxial growth. The body is finally formed by selective epitaxial growth and etch back. The oxide is removed from the trench, the trench walls are oxidized to form a gate oxide, and doped polysilicon fills the trench to form a gate. By the formation of the source region using the spacer etch, this process simplifies the fabrication of power trench gated devices, and provides for increased contact surface area without increasing device size.

    摘要翻译： 功率沟槽MOS门控晶体管由栅极沟槽区域内的栅极源极构成。 在创新的设备中，使用厚的氧化物（生长或沉积）来限定沟槽壁的高度。 最初通过选择性外延生长和回蚀而形成体区。 源区也通过选择性外延生长形成。 身体最终通过选择性外延生长和回蚀而形成。 从沟槽去除氧化物，沟槽壁被氧化以形成栅极氧化物，并且掺杂多晶硅填充沟槽以形成栅极。 通过使用间隔物蚀刻形成源极区域，该工艺简化了功率沟槽门控器件的制造，并且提供了增加的接触表面积而不增加器件尺寸。

    METHOD OF FORMING A SEMICONDUCTOR LAYER
    10.
    发明申请
    METHOD OF FORMING A SEMICONDUCTOR LAYER 有权
    形成半导体层的方法

    公开(公告)号：US20100129952A1

    公开(公告)日：2010-05-27

    申请号：US12275659

    申请日：2008-11-21

    申请人： Hunter J. Martinez ,  John J. Hackenberg ,  Jill Hildreth ,  Ross E. Noble

    发明人： Hunter J. Martinez ,  John J. Hackenberg ,  Jill Hildreth ,  Ross E. Noble

    IPC分类号： H01L31/18

    CPC分类号： H01L31/1804 ,  H01L31/103 ,  H01L31/1864 ,  Y02E10/547 ,  Y02P70/521

    摘要： A method of forming a semiconductor layer, which in one embodiment is part of a photodetector, includes forming a silicon shape, applying ozonated water, removing the first oxide layer at a temperature below 600 degrees Celsius, and epitaxially growing germanium. The silicon shape has a top surface that is exposed. The ozonated water is applied to the top surface and causes formation of a first oxide layer on the top surface. The germanium is grown on the top surface.

    摘要翻译： 一种形成半导体层的方法，其在一个实施例中是光电检测器的一部分，包括形成硅形状，施加臭氧水，在低于600摄氏度的温度下去除第一氧化物层，以及外延生长锗。 硅形状具有暴露的顶面。 臭氧水被施加到顶部表面并且在顶部表面上形成第一氧化物层。 锗在顶面生长。