公开(公告)号：US08482114B2

公开(公告)日：2013-07-09

申请号：US12757466

申请日：2010-04-09

申请人： James Raymond Spehar ,  Christian Paquet ,  Wayne A. Nunn ,  Dominicus M. Roozeboom ,  Joseph E. Schulze ,  Fatha Khalsa

发明人： James Raymond Spehar ,  Christian Paquet ,  Wayne A. Nunn ,  Dominicus M. Roozeboom ,  Joseph E. Schulze ,  Fatha Khalsa

IPC分类号： H01L23/48

CPC分类号： G06F17/5045 ,  H01L23/66 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0655 ,  H01L2223/6611 ,  H01L2223/6638 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2224/48011 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00

摘要： A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

摘要翻译： 高带宽电路被分割成多个部分，每个部分用于在对应的半导体芯片上实现，产生用于每个相应芯片的一个或多个管芯焊盘的布置，并且产生用于每个相应芯片的芯片位置，给定 产生封装和给定的封装I / O布置，芯片键合布置的产生和芯片位置相对于给定的芯片封装参数，并被产生以建立满足给定特性阻抗参数的键合线长度。 提供了用于生成分割的边界参数，包括对相应半导体芯片的面积参数上的部分数量和可选地包含的界限。

公开(公告)号：US20110057302A1

公开(公告)日：2011-03-10

申请号：US12757466

申请日：2010-04-09

申请人： James Raymond Spehar ,  Christian Paquet ,  Wayne A. Nunn ,  Dominicus M. Roozeboom ,  Joseph E. Schulze ,  Fatha Khalsa

发明人： James Raymond Spehar ,  Christian Paquet ,  Wayne A. Nunn ,  Dominicus M. Roozeboom ,  Joseph E. Schulze ,  Fatha Khalsa

IPC分类号： H01L23/498 ,  H01L23/538 ,  G06F17/50

CPC分类号： G06F17/5045 ,  H01L23/66 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L25/0655 ,  H01L2223/6611 ,  H01L2223/6638 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2224/48011 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/484 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00

摘要： A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

摘要翻译： 高带宽电路被分割成多个部分，每个部分用于在对应的半导体芯片上实现，产生用于每个相应芯片的一个或多个管芯焊盘的布置，并且产生用于每个相应芯片的芯片位置，给定 产生封装和给定的封装I / O布置，芯片键合布置的产生和芯片位置相对于给定的芯片封装参数，并且被产生以建立满足给定特性阻抗参数的键合线长度。 提供了用于生成分割的边界参数，包括对相应半导体芯片的面积参数上的部分数量和可选地包含的界限。