公开(公告)号：US09367319B2

公开(公告)日：2016-06-14

申请号：US12615108

申请日：2009-11-09

申请人： Kai-Feng Wang ,  Hong-Xia Sun

发明人： Kai-Feng Wang ,  Hong-Xia Sun

IPC分类号： G06F15/00 ,  G06F9/38

CPC分类号： G06F9/3806 ,  G06F9/3848

摘要： A system and method for predicting the execution of a branch of computer-executable instructions. In an embodiment, a branch predictor may include a program-counter register operable to store a program-counter value and a branch-history register operable to store a branch-history value. Additionally, the branch predictor may include a prediction hash table having a plurality of prediction values each uniquely corresponding to a plurality of memory locations. With these components, the branch predictor may generate a first prediction value that corresponds to the program-counter value and may generate a second prediction value that corresponds to a logical combination of the program-counter value and the branch-history value. With these two prediction values obtained from two different prediction schemas, the branch predictor is better suited to generate an overall prediction value based on the first and second prediction values that is more accurate than a single prediction value based upon a single prediction schema.

摘要翻译： 一种用于预测计算机可执行指令的分支的执行的系统和方法。 在一个实施例中，分支预测器可以包括可操作以存储程序计数器值的程序计数器寄存器和可操作以存储分支历史值的分支历史寄存器。 另外，分支预测器可以包括具有唯一对应于多个存储器位置的多个预测值的预测散列表。 利用这些组件，分支预测器可以产生对应于程序计数器值的第一预测值，并且可以生成与程序计数器值和分支历史值的逻辑组合相对应的第二预测值。 利用从两个不同的预测模式获得的这两个预测值，分支预测器更适合于基于基于单个预测模式的单个预测值更准确的第一和第二预测值来生成总体预测值。

公开(公告)号：US08953497B2

公开(公告)日：2015-02-10

申请号：US13335480

申请日：2011-12-22

申请人： Kai Feng Wang ,  PengFei Zhu ,  HongXia Sun ,  YongQiang Wu

发明人： Kai Feng Wang ,  PengFei Zhu ,  HongXia Sun ,  YongQiang Wu

IPC分类号： H04L12/56 ,  H04L12/721 ,  H04L12/761

CPC分类号： H04L45/06 ,  H04L45/16

摘要： In mesh networks having multiple nodes that communicate data to and from each other, a great number of data transmissions may be initiated and carried out to get data to a proper processing node for execution. To get data where it needs to go (e.g., the proper destination node), a routing algorithm is used to define a set of rules for efficiently passing data from node to node until the destination node is reached. For the purpose of assuring that all data is properly transferred from node to node in a reasonably efficient manner, a routing algorithm may define subsets of nodes into regions and then send data via the regions. Even greater overall efficiency may be realized by recognizing specific adjacency relationships among a group of destination nodes and taking advantage of such adjacencies by rerouting data through regions other than the region in which a destination node resides.

摘要翻译： 在具有向彼此传递数据的多个节点的网状网络中，可以启动并执行大量数据传输以将数据传送到适当的处理节点以供执行。 为了获得需要去的数据（例如，适当的目的地节点），使用路由算法来定义用于有效地将数据从节点传递到节点的规则集，直到到达目的地节点。 为了确保以合理有效的方式从节点到节点正确传输所有数据，路由算法可以将节点的子集定义为区域，然后经由区域发送数据。 通过识别一组目的地节点之间的特定邻接关系并且通过重新路由数据通过除了目的地节点驻留的区域之外的区域来利用这种相邻性，可以实现更高的总体效率。

公开(公告)号：US08370607B2

公开(公告)日：2013-02-05

申请号：US12645767

申请日：2009-12-23

申请人： Hong-Xia Sun ,  Kai-Feng Wang ,  Peng-Fei Zhu ,  Yong-Qiang Chris Wu

发明人： Hong-Xia Sun ,  Kai-Feng Wang ,  Peng-Fei Zhu ,  Yong-Qiang Chris Wu

IPC分类号： G06F9/30

CPC分类号： G06F9/3861 ,  G06F9/384

摘要： A system for recovering an architecture register mapping table (ARMT). The system includes a first number of collection circuits and decode circuits, a second number of selection circuits, and an enable circuit. Information related to the mapping between each physical register and an appropriate architecture register is obtained from a physical register mapping table (PRMT) by one and only one collection circuit during only one of a fourth number of instruction cycles. Each decode circuit has its input coupled to the output of one different collection circuit and is capable of converting its input into a third number bit wide binary string selection code at its output. Each selection circuit is configured to receive from each selection code a bit from a bit position associated with that selection circuit. The enable circuit is configured to appropriately enable mapping of information from the PRMT to the ARMT.

摘要翻译： 一种用于恢复架构寄存器映射表（ARMT）的系统。 该系统包括第一数量的收集电路和解码电路，第二数量的选择电路和使能电路。 与每个物理寄存器和适当架构寄存器之间的映射相关的信息在仅在第四数量的指令周期中由唯一的一个采集电路从物理寄存器映射表（PRMT）获得。 每个解码电路的输入耦合到一个不同的采集电路的输出端，并且能够在其输出端将其输入转换为第三数位位宽的二进制串选择码。 每个选择电路被配置为从与该选择电路相关联的位位置从每个选择代码接收一位。 使能电路被配置为适当地启用从PRMT到ARMT的信息的映射。

公开(公告)号：US08521991B2

公开(公告)日：2013-08-27

申请号：US12631098

申请日：2009-12-04

申请人： Kai-feng Wang ,  Hong-Xia Sun ,  Peng-fei Zhu ,  Yong-qiang Wu

发明人： Kai-feng Wang ,  Hong-Xia Sun ,  Peng-fei Zhu ,  Yong-qiang Wu

IPC分类号： G06F9/30

CPC分类号： G06F9/3836 ,  G06F9/3855

摘要： A technique for selecting instructions for execution from an issue queue at multiple function units while reducing the chances of instruction collisions. In an embodiment, each function unit in a processor may include a selection logic circuit that selects a specific instruction from the issue queue for execution. In order to avoid instruction collision, a function unit may have a selection logic circuit that may select two instructions from an instruction queue: one according to a first selection technique and one according to a second selection technique. Then, by comparing the instruction selected by the first selection technique to the instruction selected by the selection logic circuit of another function unit, the instruction selected by the second technique may be used instead if there will be an instruction collision because the instruction selected by the first selection technique is the same as the instruction selected at a different function unit.

摘要翻译： 一种用于在减少指令冲突的机会的同时从多个功能单元的问题队列中选择执行指令的技术。 在一个实施例中，处理器中的每个功能单元可以包括从发布队列中选择特定指令以供执行的选择逻辑电路。 为了避免指令冲突，功能单元可以具有可以从指令队列中选择两个指令的选择逻辑电路：根据第一选择技术和第二选择技术的选择逻辑电路。 然后，通过将由第一选择技术选择的指令与由另一功能单元的选择逻辑电路选择的指令进行比较，可以使用由第二技术选择的指令来代替，否则将产生指令冲突，因为由 第一选择技术与在不同功能单元处选择的指令相同。

公开(公告)号：US08291200B2

公开(公告)日：2012-10-16

申请号：US12535615

申请日：2009-08-04

申请人： Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

发明人： Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

IPC分类号： G06F9/312 ,  G06F1/32

CPC分类号： G06F9/38 ,  G06F7/02 ,  G06F9/3834 ,  G06F9/3855

摘要： A comparison circuit can reduce the amount of power consumed when searching a load queue or a store queue of a microprocessor. Some embodiments of the comparison circuit use a comparison unit that performs an initial comparison of addresses using a subset of the address bits. If the initial comparison results in a match, a second comparison unit can be enabled to compare another subset of the address bits.

摘要翻译： 比较电路可以减少在搜索微处理器的加载队列或存储队列时消耗的功率量。 比较电路的一些实施例使用比较单元，其使用地址位的子集来执行地址的初始比较。 如果初始比较导致匹配，则可以使能第二比较单元来比较另一个地址比特的子集。

公开(公告)号：US20120172681A1

公开(公告)日：2012-07-05

申请号：US13341013

申请日：2011-12-30

申请人： Hong Xia SUN ,  Yong Qiang WU ,  Kai Feng WANG ,  Peng Fei ZHU

发明人： Hong Xia SUN ,  Yong Qiang WU ,  Kai Feng WANG ,  Peng Fei ZHU

IPC分类号： A61B5/0205 ,  A61B5/11

CPC分类号： G01P9/02 ,  A61B5/0022 ,  A61B5/01 ,  A61B5/0205 ,  A61B5/02438 ,  A61B5/067 ,  A61B5/1114 ,  A61B5/1115 ,  A61B5/1116 ,  A61B5/1117 ,  A61B5/113 ,  A61B5/6898 ,  A61B5/747 ,  G01C21/20 ,  G16H40/67

摘要： An embodiment comprises includes an apparatus with a housing wearable by a subject and a first sensor operable to detect a position of the subject. An embodiment of the apparatus includes a second sensor operable to detect a body state of the subject, where the first body state may be a vital sign such as heart rate, blood pressure, body temperature or respiratory rate. The apparatus may also include a wireless module, and be operable to transmit body state data and position data to a remote device. The apparatus may include a gyroscope or an accelerometer, and may be operable to detect rotational change in the subject's position about and axis, linear acceleration of the subject along an axis, a change in position of the subject, or a rate of change in position of the subject.

摘要翻译： 一个实施例包括具有可由受试者穿戴的外壳的装置和可操作以检测被检者的位置的第一传感器。 该装置的实施例包括可操作以检测被检体的身体状态的第二传感器，其中第一身体状态可以是诸如心率，血压，体温或呼吸频率的生命体征。 该装置还可以包括无线模块，并且可操作以将身体状态数据和位置数据传送到远程设备。 该装置可以包括陀螺仪或加速度计，并且可以可操作以检测被摄体位置周围的轴的旋转变化，沿着轴的对象的线性加速度，对象的位置变化或位置的变化率 的主题。

公开(公告)号：US20120157769A1

公开(公告)日：2012-06-21

申请号：US13329293

申请日：2011-12-18

申请人： Peng Fei Zhu ,  Yong Qiang Wu ,  Kai Feng Wang ,  Hong Xia Sun

发明人： Peng Fei Zhu ,  Yong Qiang Wu ,  Kai Feng Wang ,  Hong Xia Sun

IPC分类号： A61B1/04

CPC分类号： G01C19/02 ,  A61B1/00016 ,  A61B1/0002 ,  A61B1/00032 ,  A61B1/00057 ,  A61B1/00158 ,  A61B1/041 ,  A61B1/0661 ,  G01C19/00

摘要： An embodiment comprises and apparatus having an image capture device with an image axis and a gyroscope operable to indicate the orientation of the image axis. An embodiment of a capsule endoscopy system comprises an imaging capsule and an external unit. The imaging capsule may comprise an image capture device having an image axis and a gyroscope operable to indicate the orientation of the image axis. The external unit may comprise a gyroscope operable to indicate an orientation of a subject and a harness wearable by a subject and operable to align the gyroscope with the subject. The imaging capsule may send and image to an external unit for processing and display, and the external unit may provide for calculation of the image-axis orientation relative to the body.

摘要翻译： 实施例包括具有图像轴的图像捕获装置和可操作以指示图像轴的取向的陀螺仪的装置。 胶囊内窥镜系统的实施例包括成像胶囊和外部单元。 成像胶囊可以包括具有图像轴的图像捕获装置和可操作以指示图像轴的取向的陀螺仪。 外部单元可以包括陀螺仪，其可操作以指示受试者的方位和由受试者佩戴的线束并可操作以将陀螺仪与对象对准。 成像胶囊可以发送和图像到外部单元进行处理和显示，并且外部单元可以提供相对于身体的图像轴取向的计算。

公开(公告)号：US20100169626A1

公开(公告)日：2010-07-01

申请号：US12615108

申请日：2009-11-09

申请人： Kai-Feng WANG ,  Hong-Xia Sun

发明人： Kai-Feng WANG ,  Hong-Xia Sun

IPC分类号： G06F9/38

CPC分类号： G06F9/3806 ,  G06F9/3848

摘要： A system and method for predicting the execution of a branch of computer-executable instructions. In an embodiment, a branch predictor may include a program-counter register operable to store a program-counter value and a branch-history register operable to store a branch-history value. Additionally, the branch predictor may include a prediction hash table having a plurality of prediction values each uniquely corresponding to a plurality of memory locations. With these components, the branch predictor may generate a first prediction value that corresponds to the program-counter value and may generate a second prediction value that corresponds to a logical combination of the program-counter value and the branch-history value. With these two prediction values obtained from two different prediction schemas, the branch predictor is better suited to generate an overall prediction value based on the first and second prediction values that is more accurate than a single prediction value based upon a single prediction schema.

摘要翻译： 一种用于预测计算机可执行指令的分支的执行的系统和方法。 在一个实施例中，分支预测器可以包括可操作以存储程序计数器值的程序计数器寄存器和可操作以存储分支历史值的分支历史寄存器。 另外，分支预测器可以包括具有唯一对应于多个存储器位置的多个预测值的预测散列表。 利用这些组件，分支预测器可以产生对应于程序计数器值的第一预测值，并且可以生成对应于程序计数器值和分支历史值的逻辑组合的第二预测值。 利用从两个不同的预测模式获得的这两个预测值，分支预测器更适合于基于基于单个预测模式的单个预测值更准确的第一和第二预测值来生成总体预测值。

公开(公告)号：US20100169625A1

公开(公告)日：2010-07-01

申请号：US12535590

申请日：2009-08-04

申请人： Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

发明人： Kai-Feng Wang ,  Hong-Xia Sun ,  Yong-Qiang Wu

IPC分类号： G06F9/44

CPC分类号： G06F9/3806 ,  G06F9/3844

摘要： Some microprocessors check branch prediction information in a branch history table and/or a branch target buffer. To check for branch prediction information, a microprocessor can identify which instructions are control flow instructions and which instructions are non control flow instructions. To reduce power consumption in the branch history table and/or branch target buffer, the branch history table and/or branch target buffer can check for branch prediction information corresponding to the control flow instructions and not the non control flow instructions.

摘要翻译： 一些微处理器检查分支历史表和/或分支目标缓冲器中的分支预测信息。 为了检查分支预测信息，微处理器可以识别哪些指令是控制流程指令，哪些指令是非控制流程指令。 为了减少分支历史表和/或分支目标缓冲器中的功耗，分支历史表和/或分支目标缓冲器可以检查与控制流程指令相对应的分支预测信息，而不是非控制流程指令。

公开(公告)号：US20100169617A1

公开(公告)日：2010-07-01

申请号：US12645767

申请日：2009-12-23

申请人： Hong-Xia Sun ,  Kai-Feng Wang ,  Peng-Fei Zhu ,  Yong-Qiang Chris Wu

发明人： Hong-Xia Sun ,  Kai-Feng Wang ,  Peng-Fei Zhu ,  Yong-Qiang Chris Wu

IPC分类号： G06F9/00 ,  G06F9/40

CPC分类号： G06F9/3861 ,  G06F9/384

摘要： A system for recovering an architecture register mapping table (ARMT). The system includes a first number of collection circuits and decode circuits, a second number of selection circuits, and an enable circuit. Information related to the mapping between each physical register and an appropriate architecture register is obtained from a physical register mapping table (PRMT) by one and only one collection circuit during only one of a fourth number of instruction cycles. Each decode circuit has its input coupled to the output of one different collection circuit and is capable of converting its input into a third number bit wide binary string selection code at its output. Each selection circuit is configured to receive from each selection code a bit from a bit position associated with that selection circuit. The enable circuit is configured to appropriately enable mapping of information from the PRMT to the ARMT.

摘要翻译： 一种用于恢复架构寄存器映射表（ARMT）的系统。 该系统包括第一数量的收集电路和解码电路，第二数量的选择电路和使能电路。 与每个物理寄存器和适当架构寄存器之间的映射相关的信息在仅在第四数量的指令周期中由唯一的一个采集电路从物理寄存器映射表（PRMT）获得。 每个解码电路的输入耦合到一个不同的采集电路的输出端，并且能够在其输出端将其输入转换为第三数位位宽的二进制串选择码。 每个选择电路被配置为从与该选择电路相关联的位位置从每个选择代码接收一位。 使能电路被配置为适当地启用从PRMT到ARMT的信息的映射。