公开(公告)号：US07737466B1

公开(公告)日：2010-06-15

申请号：US11889420

申请日：2007-08-13

申请人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

发明人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

IPC分类号： H01L29/06 ,  H01L35/26

CPC分类号： H01L21/823807 ,  H01L27/0629 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10829 ,  H01L27/10894 ,  H01L29/92

摘要： A semiconductor device includes a substrate having a first area and a second area adjacent to the first area, a first silicon layer provided on the substrate in the first area, a relaxed layer which is provided on the substrate in the second area and which has a lattice constant greater than a lattice constant of the first silicon layer, and a strained-Si layer which is provided on the relaxed layer and which has a lattice constant substantially equivalent to the lattice constant of the relaxed layer.

摘要翻译： 半导体器件包括具有与第一区域相邻的第一区域和第二区域的衬底，设置在第一区域中的衬底上的第一硅层，设置在第二区域中的衬底上的松弛层， 晶格常数大于第一硅层的晶格常数，以及设置在松弛层上并具有与弛豫层的晶格常数基本相等的晶格常数的应变Si层。

公开(公告)号：US20070290208A1

公开(公告)日：2007-12-20

申请号：US11889451

申请日：2007-08-13

申请人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

发明人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

IPC分类号： H01L29/10

CPC分类号： H01L21/823807 ,  H01L27/0629 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10829 ,  H01L27/10894 ,  H01L29/92

摘要： A semiconductor device includes a substrate having a first area and a second area adjacent to the first area, a first silicon layer provided on the substrate in the first area, a relaxed layer which is provided on the substrate in the second area and which has a lattice constant greater than a lattice constant of the first silicon layer, and a strained-Si layer which is provided on the relaxed layer and which has a lattice constant substantially equivalent to the lattice constant of the relaxed layer.

摘要翻译： 半导体器件包括具有与第一区域相邻的第一区域和第二区域的衬底，设置在第一区域中的衬底上的第一硅层，设置在第二区域中的衬底上的松弛层， 晶格常数大于第一硅层的晶格常数，以及设置在松弛层上并具有与弛豫层的晶格常数基本相等的晶格常数的应变Si层。

公开(公告)号：US20090101987A1

公开(公告)日：2009-04-23

申请号：US12252140

申请日：2008-10-15

申请人： Kaoru HIYAMA ,  Tatsurou Sawada ,  Osamu Fujii

发明人： Kaoru HIYAMA ,  Tatsurou Sawada ,  Osamu Fujii

IPC分类号： H01L27/092 ,  H01L21/311

CPC分类号： H01L21/823412 ,  H01L21/823807 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a semiconductor substrate; a p-channel field effect transistor formed in a first region of the semiconductor substrate; an n-channel field effect transistor formed in a second region of the semiconductor substrate; a compressive stress film with a compressive stress generated inside, the compressive stress film covering the first region; a tensile stress film with a tensile stress generated inside, the tensile stress film covering the second region; and a buffer film located between the p-channel field effect transistor and the n-channel field effect transistor on the semiconductor substrate, the magnitude of internal stress of the buffer film being smaller than the magnitude of the compressive stress of the compressive stress film and the magnitude of the tensile stress of the tensile stress film.

摘要翻译： 半导体器件包括：半导体衬底; 形成在所述半导体衬底的第一区域中的p沟道场效应晶体管; 形成在所述半导体衬底的第二区域中的n沟道场效应晶体管; 压缩应力薄膜，其内部产生压缩应力，压缩应力薄膜覆盖第一区域; 拉伸应力膜，其内部产生拉伸应力，拉伸应力膜覆盖第二区域; 以及位于半导体衬底上的p沟道场效应晶体管和n沟道场效应晶体管之间的缓冲膜，缓冲膜的内应力的大小小于压缩应力膜的压缩应力的大小， 拉伸应力膜的拉伸应力的大小。

公开(公告)号：US20050151163A1

公开(公告)日：2005-07-14

申请号：US11026542

申请日：2005-01-03

申请人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

发明人： Kaoru Hiyama ,  Tomoya Sanuki ,  Osamu Fujii

IPC分类号： H01L21/822 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8239 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L27/105 ,  H01L27/108 ,  H01L29/786 ,  H01L29/92 ,  H01L29/10

CPC分类号： H01L21/823807 ,  H01L27/0629 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10829 ,  H01L27/10894 ,  H01L29/92

摘要： A semiconductor device includes a substrate having a first area and a second area adjacent to the first area, a first silicon layer provided on the substrate in the first area, a relaxed layer which is provided on the substrate in the second area and which has a lattice constant greater than a lattice constant of the first silicon layer, and a strained-Si layer which is provided on the relaxed layer and which has a lattice constant substantially equivalent to the lattice constant of the relaxed layer.

摘要翻译： 半导体器件包括具有与第一区域相邻的第一区域和第二区域的衬底，设置在第一区域中的衬底上的第一硅层，设置在第二区域中的衬底上的松弛层， 晶格常数大于第一硅层的晶格常数，以及设置在松弛层上并具有与弛豫层的晶格常数基本相等的晶格常数的应变Si层。