摘要:
To provide a semiconductor device including an interface chip and a core chip and a measurement-target signal line and a reference signal line each including a through silicon via provided in the core chip and electrically connecting the interface chip and the core chip. The interface chip outputs a test clock generated by a first signal generation circuit to the core chip. The core chip includes a second signal generation circuit that generates a predetermined measurement signal from the test clock, and outputs the predetermined measurement signal to the measurement-target signal line and the reference signal line in a simultaneous manner. Further, the interface chip detects a phase difference of a plurality of predetermined measurement signals input via the measurement-target signal line and the reference signal line by an operational amplifier, and outputs a test result to a determination circuit.
摘要:
A stationary device 20 sends a portable-device finding signal to a portable device 10 from a plurality of stationary-device side antennae 24 and 25, which are located at different positions. Upon receipt of the portable-device finding signal from the stationary device 20, the portable device 10 sends a reception intensity data signal to the stationary device 20. The stationary device 20 determines the current position of the portable device 10 by using reception intensity data of the portable-device finding signals, which are received at the stationary-device side antennae, from the portable device 10.
摘要:
Antennas 22 to 25 of a main unit machine 20 are implemented as coil antennas and the coil antennas are disposed in parallel with the floor of a vehicle so that the axis of each coil antenna becomes perpendicular to the floor. Particularly, the in-vehicle antennas 24 and 25 are placed at the front and the rear near the center in the floor direction of the vehicle.
摘要:
To provide a semiconductor device including an interface chip and a core chip and a measurement-target signal line and a reference signal line each including a through silicon via provided in the core chip and electrically connecting the interface chip and the core chip. The interface chip outputs a test clock generated by a first signal generation circuit to the core chip. The core chip includes a second signal generation circuit that generates a predetermined measurement signal from the test clock, and outputs the predetermined measurement signal to the measurement-target signal line and the reference signal line in a simultaneous manner. Further, the interface chip detects a phase difference of a plurality of predetermined measurement signals input via the measurement-target signal line and the reference signal line by an operational amplifier, and outputs a test result to a determination circuit.
摘要:
A holder of a surface mount motor includes a holder body that is in contact with an outer peripheral surface of a motor casing and that is mounted on a circuit board, an extending portion that extends rearward from a rear end of the holder body in a direction of a rotational axis of a shaft, and a stopper that extends in a width direction of the extending portion at a rear end of the extending portion and that is press-fitted into a recess provided in a bracket fixed to the motor casing.
摘要:
A method for manufacturing a stacked semiconductor memory device includes testing a plurality of memory chips to detect first defective addresses, programming optical fuses with first defective address information on each of the plurality of memory chips that have the first defective addresses, stacking the plurality of memory chips, testing the stacked memory chips to detect second defective addresses, and programming electrical fuses with second defective address information.
摘要:
A semiconductor device includes a plurality of first chips, a second chip that controls the first chips, and internal wiring that connects the first chips and the second chip. The first chips each include: an optical fuse; a first latch circuit that retains information on the optical fuse; a second latch circuit that retains information on an electrical fuse, the information being supplied from the second chip through the internal wiring; and a select circuit that selects the information retained in either one of the first and second latch circuits. A redundancy determination signal is generated from the information selected. The information on the electrical fuse is transferred from the second chip to the first chips through the internal wiring.
摘要:
A holder of a surface mount motor includes a bottom-raising piece formed so as to extend integrally from the bottom portion and bent at a predetermined bending angle with respect to the bottom portion. When the holder is attached to a motor body, there is a risk that a mounting surface of the bottom portion of the holder will not be in the same plane as a mounting surface of a terminal. In such a case, a fine adjustment may be performed simply by slightly raising or lowering the bottom-raising piece. Thus, an adjustment between the heights of the mounting surface of the bottom portion of the holder and the mounting surface of the terminal can be easily performed. A gap between the bottom portion of the holder and the motor casing can be easily changed simply by changing the bending angle of the bottom-raising piece.
摘要:
A semiconductor device includes a plurality of first chips, a second chip that controls the first chips, and internal wiring that connects the first chips and the second chip. The first chips each include: an optical fuse; a first latch circuit that retains information on the optical fuse; a second latch circuit that retains information on an electrical fuse, the information being supplied from the second chip through the internal wiring; and a select circuit that selects the information retained in either one of the first and second latch circuits. A redundancy determination signal is generated from the information selected. The information on the electrical fuse is transferred from the second chip to the first chips through the internal wiring.