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公开(公告)号：US06418173B1
公开(公告)日：2002-07-09
申请号：US09101443
申请日：1998-07-15
IPC分类号： H04K102
CPC分类号： H03F1/3247 , H03C3/406 , H03F1/3258 , H03F1/3294 , H03F2200/57 , H03F2201/3233 , H04L27/368
摘要： Nonlinear distortion compensating data is calculated by approximation equations at a compensating coefficient calculation section using an amplitude value of transmission quadrature base band signals obtained by a power calculating section, wherein by carrying out nonlinear distortion compensation at a nonlinear distortion compensating section using the data, it is possible to compensate nonlinear distortion generated in an amplifier of the transmission system without use of any memory table, and a nonlinear distortion compensating section can be obtained, which has a great effect of decrease distortion.
摘要翻译： 非线性失真补偿数据由补偿系数计算部使用由功率计算部获得的发送正交基带信号的振幅值来计算，其中，通过使用该数据在非线性失真补偿部进行非线性失真补偿， 可以补偿在传输系统的放大器中产生的非线性失真而不使用任何存储表，并且可以获得非线性失真补偿部分，其具有减小失真的很大的效果。
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公开(公告)号：US5150383A
公开(公告)日：1992-09-22
申请号：US665857
申请日：1991-03-07
申请人： Kouei Misaizu , Hiroshi Ohnishi
发明人： Kouei Misaizu , Hiroshi Ohnishi
IPC分类号： H04L27/38
CPC分类号： H04L27/3854
摘要： An asynchronous quadrature demodulator which comprises an asynchronous quadrature detector, a frequency compensating circuit for estimating and compensating a frequency offset between an oscillating frequency of a local oscillator of the asynchronous quadrature detector and a frequency of a received carrier frequency on the basis of correcting signals, a base band complex equalizer for eliminating a transmission-channel distortion due to a multiplex transmission and a data demodulator. Thereby, a reference carrier recovery circuit becomes unnecessary. Thus, the structure of the demodulator can be simplified. Further, the demodulator can stably operate on the transmission channel.
摘要翻译： 一种异步正交解调器，包括异步正交检测器，用于基于校正信号估计和补偿异步正交检测器的本地振荡器的振荡频率与接收载波频率之间的频率偏移的频率补偿电路， 基带复合均衡器，用于消除由多路复用传输引起的传输信道失真和数据解调器。 因此，不需要参考载波恢复电路。 因此，可以简化解调器的结构。 此外，解调器可以在传输信道上稳定地操作。
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公开(公告)号：US5487089A
公开(公告)日：1996-01-23
申请号：US16222
申请日：1993-02-11
申请人： Kouei Misaizu , Shoichiro Honda , Hiroshi Ohnishi
发明人： Kouei Misaizu , Shoichiro Honda , Hiroshi Ohnishi
CPC分类号： H04L25/03133
摘要： An input bit sequence is converted into n-bit parallel symbol signals each representing one symbol. A shift register stores an "m" number of the n-bit parallel symbol signals, shifting the n-bit parallel symbol signals one symbol by one symbol and outputting them. At least one selector is operative for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to a clock signal, where k equals 1, 2, . . . , (m-1)/2. A sampling counter serves to count pairs of successive clock pulses of the clock signal. An Exclusive-OR circuit executes Exclusive-OR operation between the clock signal and an output signal of the sampling counter. At least one first read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A second read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A filter output signal is generated by combining the data output by the first read-only memory and the second read-only memory.
摘要翻译： 输入比特序列被转换成每个表示一个符号的n位并行符号信号。 移位寄存器存储“m”个n位并行符号信号，将n位并行符号信号一个符号一个符号移位并输出。 至少一个选择器用于响应于时钟信号顺序地选择移位寄存器输出的第k个符号信号和（m + 1）-k个符号信号中的一个，其中k等于1,2。 。 。 ，（m-1）/ 2。 采样计数器用于计数时钟信号的连续时钟脉冲对。 异或电路在时钟信号和采样计数器的输出信号之间执行异或运算。 至少一个第一只读存储器存储表示预定脉冲响应波形的部分的数据，并响应于具有较高和较低部分的地址信号输出数据。 第二只读存储器存储表示预定脉冲响应波形的部分的数据，并且响应于具有较高和较低部分的地址信号输出数据。 通过组合由第一只读存储器和第二只读存储器输出的数据来生成滤波器输出信号。
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4.发明授权Frame synchronizing apparatus for quadrature modulation data communication radio receiver 失效正交调制数据通信无线电接收机的帧同步装置
公开(公告)号：US5463627A
公开(公告)日：1995-10-31
申请号：US200592
申请日：1994-02-23
CPC分类号： H04L7/042 , H03L7/085 , H04J3/06 , H04L7/0331 , H04L7/08
摘要： In a frame synchronizing apparatus for a receiver apparatus of a digital data radio communications system in which data are transmitted in frame periods with a fixed data sequence contained each frame, a data correlation circuit obtains successive sequences of values of vector difference between vector values constituting a demodulated digital baseband signal, and successively compares these sequences with a fixed vector difference sequence corresponding to the fixed data sequence, to derive a correlation signal substantially unaffected by any phase rotation in the baseband signal. A frame synchronizing circuit formed as a PLL for generating a frame synchronizing signal, includes a phase comparator which periodically indicates whether a detected phase difference between the correlation signal and frame synchronizing signal is effectively zero, positive or negative, and a counter holding a count value indicating a cumulative phase error between these signals. So long as the detected phase differences are successively effectively zero and the cumulative phase error is sufficiently small, the phase of the frame synchronizing signal is held unchanged, thereby achieving a high degree of phase stability.
摘要翻译： 在数字数据无线电通信系统的接收机装置的帧同步装置中，数据在具有包含每一帧的固定数据序列的帧周期中被发送，数据相关电路获得构成矢量的矢量值之间的向量差的值的连续序列 解调的数字基带信号，并且将这些序列与对应于固定数据序列的固定向量差异序列连续地进行比较，以导出基本上不受基带信号中的任何相位旋转影响的相关信号。 形成为用于产生帧同步信号的PLL的帧同步电路包括周期性地指示相关信号和帧同步信号之间的检测到的相位差是否为零或正的负相位的相位比较器，以及保持计数值的计数器 表示这些信号之间的累积相位误差。 只要检测到的相位差连续有效地为零并且累积相位误差足够小，则帧同步信号的相位保持不变，从而实现高度的相位稳定性。
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公开(公告)号：US4876744A
公开(公告)日：1989-10-24
申请号：US144156
申请日：1988-01-15
申请人： Kouei Misaizu , Mitsuo Makimoto , Haruyoshi Endo
发明人： Kouei Misaizu , Mitsuo Makimoto , Haruyoshi Endo
CPC分类号： H03D9/0633 , H03D2200/0003 , H03D2200/0013 , H03D2200/0023 , H03D7/1408
摘要： A mixer for outputting an intermediate frequency signal as the result of mixing of a radio frequency signal and a local oscillator signal which are inputted into the mixer. The mixer comprises a balanced-to-unbalanced conversion circuit and a bridge-coupled diode circuit and the balanced-to-unbalanced conversion circuit is constructed of first and second rat race circuits, one being for the radio frequencey signal and comprising a first ring-shaped line and the other being for the local oscillator signal and comprising a second ring-shaped line. The mixer is arranged to include a substrate having first and second pattern-forming surfaces and the first ring-shaped line of the first rat race circuit is formed as a pattern on the first pattern-forming surface of the substrate and the second ring-shaped line of the second rat race circuit is formed as a pattern on the second pattern-forming surface. The bridge-coupled diode circuit is positioned on the first pattern-forming surface thereof and inside the patterned first ring-shaped line.
摘要翻译： 一种用于输出中频信号的混频器，作为输入混频器的射频信号和本地振荡器信号的混合结果。 混频器包括平衡不平衡转换电路和桥耦合二极管电路，并且平衡不平衡转换电路由第一和第二大鼠游戏电路构成，一个用于无线电频率信号，并且包括第一环 - 并且另一个用于本地振荡器信号并且包括第二环形线。 混合器被布置成包括具有第一和第二图案形成表面的基板，并且第一大鼠赛道回路的第一环形线形成为基板的第一图案形成表面上的图案，并且第二环形 第二大鼠赛道回路的线形成为第二图案形成表面上的图案。 桥耦合二极管电路位于其第一图案形成表面上并且位于图案化的第一环形线内部。
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公开(公告)号：US5335251A
公开(公告)日：1994-08-02
申请号：US995077
申请日：1992-12-22
CPC分类号： H04L1/02 , H04B7/0822 , H04L25/03063
摘要： A diversity receiver includes a first antenna and a second antenna. A first receiving section connected to the first antenna serves to convert a digital modulation wave induced at the first antenna into a first intermediate-frequency signal. A first band pass filter connected to the first receiving section serves to subject the first intermediate-frequency signal to a band pass filtering process. A second receiving section connected to the second antenna serves to convert a digital modulation wave induced at the second antenna into a second intermediate-frequency signal. A second band pass filter connected to the second receiving section serves to subject the second intermediate-frequency signal to a band pass filtering process. A switch alternately selects one of output signals of the first and second band pass filters at a period equal to a half of a period corresponding to the symbol rate. A quadrature demodulator connected to the switch serves to demodulate an output signal of the switch into quadrature baseband signals. An analog-to-digital converter connected to the quadrature demodulator converts the quadrature baseband signals into corresponding digital signals. A decision feedback adaptive equalizer connected to the analog-to-digital converter serves to subject the digital signals to an equalizing process.
摘要翻译： 分集接收机包括第一天线和第二天线。 连接到第一天线的第一接收部分用于将在第一天线处感应的数字调制波转换为第一中频信号。 连接到第一接收部分的第一带通滤波器用于使第一中频信号进行带通滤波处理。 连接到第二天线的第二接收部分用于将在第二天线处感应的数字调制波转换为第二中频信号。 连接到第二接收部分的第二带通滤波器用于使第二中频信号进行带通滤波处理。 交换机以等于对应于符号率的周期的一半的周期交替地选择第一和第二带通滤波器的输出信号之一。 连接到开关的正交解调器用于将开关的输出信号解调为正交基带信号。 连接到正交解调器的模数转换器将正交基带信号转换成相应的数字信号。 连接到模数转换器的判决反馈自适应均衡器用于对数字信号进行均衡处理。
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7.发明授权Terminal unit apparatus for time division multiplexing access communications system 失效用于时分复用接入通信系统的终端装置
公开(公告)号：US5200977A
公开(公告)日：1993-04-06
申请号：US660054
申请日：1991-02-25
申请人： Hiroshi Ohnishi , Yuuri Yamamoto , Kouei Misaizu
发明人： Hiroshi Ohnishi , Yuuri Yamamoto , Kouei Misaizu
CPC分类号： H03H21/0012 , H04B7/005
摘要： A terminal unit apparatus for a time division multiplexing access radio communications system formed of a base station and a number of terminal units remote from the base station, includes a 2-dimensional adaptive equalizer circuit for equalizing two quadrature-relationship baseband signals which are obtained from a received quadrature digital modulation signal during receiving operation of the terminal unit, and an internal signal source which generates a local oscillator signal for use in demodulating a received signal to obtain these baseband signals. A frequency correction quantity is derived from the average rate of variation in each symbol interval of the ratio of the two main tap coefficients of the 2-dimensional adaptive equalizer circuit, and used to correct the frequency of operation of the internal signal source during both receiving operation and also in transmitting operation, in which the internal signal source provides a carrier signal for modulation. Frequency correction can thereby be achieved that is independent of the effects of multi-path interference to the transmission path upon the received quadrature digital modulation signal.
摘要翻译： 一种用于由基站和远离该基站的多个终端单元形成的时分复用接入无线电通信系统的终端单元装置，包括：二维自适应均衡器电路，用于均衡两个正交关系基带信号， 在终端单元的接收操作期间接收的正交数字调制信号，以及产生用于解调接收信号以获得这些基带信号的本地振荡器信号的内部信号源。 从二维自适应均衡器电路的两个主抽头系数的比率的每个符号间隔的平均变化率导出频率校正量，并且用于在两个接收期间校正内部信号源的操作频率 操作和发送操作，其中内部信号源提供用于调制的载波信号。 从而可以实现与接收到的正交数字调制信号时的多路径干扰对传输路径的影响的频率校正。
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公开(公告)号：US06324221B1
公开(公告)日：2001-11-27
申请号：US09101443
申请日：1998-07-15
IPC分类号： H04K102
摘要： Nonlinear distortion compensating data is calculated by approximation equations at a compensating coefficient calculation section using an amplitude value of transmission quadrature base band signals obtained by a power calculating section, wherein by carrying out nonlinear distortion compensation at a nonlinear distortion compensating section using the data, it is possible to compensate nonlinear distortion generated in an amplifier of the transmission system without use of any memory table, and a nonlinear distortion compensating section can be obtained, which has a great effect of decrease distortion.
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公开(公告)号：US5448197A
公开(公告)日：1995-09-05
申请号：US191527
申请日：1994-02-04
CPC分类号： H03D7/125
摘要： A frequency conversion circuit for mixing first and second frequency signals to supply an output frequency signal comprises: first and second FETs having first and second gates for receiving the first and second frequency signals respectively; and a third FET having a third gate ac-grounded, the first to third FETs being connected in series such that a current flowing through the current circuit between the source and drain is controlled by the first to third gates, the third FET being provided between the first and second FETs. The third FET may also be provided between connection an end of the series connector and the second FET in accordance with frequency differences between the first and second frequency signals and between the second frequency signal and the output frequency signal. A triple gate FET can be used in place of these three FETs connected in series. A quad gate FET can be used also. A mixing circuit including the frequency conversion circuit mentioned above is also disclosed.
摘要翻译： 一种用于混合第一和第二频率信号以提供输出频率信号的频率转换电路包括：具有分别用于接收第一和第二频率信号的第一和第二门的第一和第二FET; 以及具有第三栅极交流接地的第三FET，所述第一至第三FET串联连接，使得流过所述源极和漏极之间的电流电路的电流由所述第一至第三栅极控制，所述第三FET设置在 第一和第二FET。 第三FET也可以根据第一和第二频率信号之间以及第二频率信号和输出频率信号之间的频率差在串联连接器的端部和第二FET之间的连接之间提供。 可以使用三栅极FET来代替串联连接的这三个FET。 也可以使用四极FET。 还公开了包括上述变频电路的混合电路。
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公开(公告)号：US4791387A
公开(公告)日：1988-12-13
申请号：US133395
申请日：1987-12-15
申请人： Makoto Hasegawa , Kouei Misaizu , Mitsuo Makimoto
发明人： Makoto Hasegawa , Kouei Misaizu , Mitsuo Makimoto
CPC分类号： H03L7/23 , H03L2207/10
摘要： A microwave band frequency synthesizer comprises first and second phase-locking loops. The first phase-locking loop includes a first voltage controlled oscillator, a variable frequency divider and a first multiplier and generates an output signal whose frequency changes at the rate of a unit frequency change width of the oscillator. The second phase-locking loop includes a first fixed frequency divider for frequency-dividing the output signal of the first phase-locking loop to provide a phase comparison reference signal of a frequency higher than that phase-compared in the first phase-locking loop, a second voltage controlled oscillator, a second fixed frequency divider for frequency dividing an output of the second voltage controlled oscillator, a second phase comparator for phase-comparing a frequency-divided an output signal of the second fixed frequency divider and the phase comparison reference signal in order for phase-locking of the second voltage controlled oscillator, and a second multiplier for multiplying the output signal from the second voltage controlled oscillator to provide a microwave band signal.
摘要翻译： 微波频带频率合成器包括第一和第二锁相环。 第一锁相环包括第一压控振荡器，可变分频器和第一乘法器，并产生其频率以振荡器的单位频率变化幅度的速率变化的输出信号。 第二锁相环包括用于对第一锁相环的输出信号进行分频的第一固定分频器，以提供比第一锁相环中相位比较的频率高的相位比较参考信号， 第二压控振荡器，用于对第二压控振荡器的输出进行分频的第二固定分频器，用于对第二固定分频器的分频后的输出信号和相位比较基准信号进行相位比较的第二相位比较器 为了相位锁定第二压控振荡器，以及第二乘法器，用于将来自第二压控振荡器的输出信号相乘以提供微波频带信号。
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