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1.发明授权Very long instruction word (VLIW) computer having efficient instruction code format 有权超长指令字（VLIW）计算机具有有效的指令码格式公开(公告)号：US08738892B2
公开(公告)日：2014-05-27
申请号：US12103372
申请日：2008-04-15
IPC分类号： G06F15/00
CPC分类号： G06F9/3853 , G06F9/30145 , G06F9/30156 , G06F9/3016 , G06F9/3822 , G06F9/3885
摘要： A Very Long Instruction Word (VLIW) processor having an instruction set with a reduced size resulting in a small number of bits being necessary to specify registers. The VLIW processor includes a register file, and first through third operation units, and executes a very long instruction word. Further, the very long instruction word includes a register specifying field which specifies a least one of the registers in the register file and a plurality of instructions. The operand of each instruction includes bits src1, src2, and dst, which indicate whether or not the registers specified by the register specifying field are to be used as the source register and the destination register.
摘要翻译： 具有缩小尺寸的指令集的超长指令字（VLIW）处理器，导致指定寄存器所需的少量位。 VLIW处理器包括寄存器文件和第一至第三操作单元，并且执行非常长的指令字。 此外，非常长的指令字包括指定寄存器文件中的至少一个寄存器和多个指令的寄存器指定字段。 每个指令的操作数包括位src1，src2和dst，它们指示由寄存器指定字段指定的寄存器是否用作源寄存器和目标寄存器。
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公开(公告)号：US20090268822A1
公开(公告)日：2009-10-29
申请号：US12273717
申请日：2008-11-19
申请人： Kengo TERADA , Kouji Nakajima , Keisuke Kondou
发明人： Kengo TERADA , Kouji Nakajima , Keisuke Kondou
CPC分类号： H04N19/533 , G06T7/238 , G06T2207/10016 , H04N19/61
摘要： A moving image encoding apparatus includes a motion vector detecting unit for executing from a wide and coarse search to a narrow and fine search in a plurality of steps and in a stepwise manner to detect a motion vector of each block in an input image. The motion vector detecting unit includes a block combining unit for generating a combination block, depending on a result of detection in a search step, a search use pixel extracting unit for extracting a search use pixel to be used in a next search step, from the combination block, and a second search combination block searching unit for performing the next search step with respect to the combination block using the search use pixel, and setting a detected motion vector of the combination block as the motion vector of each block of the combination block.
摘要翻译： 运动图像编码装置包括：运动矢量检测单元，用于从多个步骤中以逐步的方式从广泛粗略搜索到窄和精细搜索，以检测输入图像中每个块的运动矢量。 运动矢量检测单元包括：块组合单元，用于根据搜索步骤中的检测结果生成组合块;搜索使用像素提取单元，用于从下一个搜索步骤中提取要使用的搜索使用像素 组合块和第二搜索组合块搜索单元，用于使用搜索使用像素执行关于组合块的下一个搜索步骤，并且将检测到的组合块的运动矢量设置为组合块的每个块的运动矢量 。
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3.发明授权Very long instruction word (VLIW) computer having an efficient instruction code format 有权非常长的指令字（VLIW）计算机具有有效的指令码格式公开(公告)号：US07383422B2
公开(公告)日：2008-06-03
申请号：US10949230
申请日：2004-09-27
IPC分类号： G06F15/76
CPC分类号： G06F9/3853 , G06F9/30145 , G06F9/30156 , G06F9/3016 , G06F9/3822 , G06F9/3885
摘要： A Very Long Instruction Word (VLIW) processor having an instruction set with a reduced size resulting in a small number of bits being necessary to specify registers. The VLIW processor includes a register file, and first through third operation units, and executes a very long instruction word. Further, the very long instruction word includes a register specifying field which specifies a least one of the registers in the register file and a plurality of instructions. The operand of each instruction includes bits src1, src2, and dst, which indicate whether or not the registers specified by the register specifying field are to be used as the source register and the destination register.
摘要翻译： 具有缩小尺寸的指令集的超长指令字（VLIW）处理器，导致指定寄存器所需的少量位。 VLIW处理器包括寄存器文件和第一至第三操作单元，并且执行非常长的指令字。 此外，非常长的指令字包括指定寄存器文件中的至少一个寄存器和多个指令的寄存器指定字段。 每个指令的操作数包括位src 1，src 2和dst，它们指示由寄存器指定字段指定的寄存器是否用作源寄存器和目标寄存器。
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4.发明申请Video decoding device, video decoding method, video decoding program, and video decoding integrated circuit 有权视频解码装置，视频解码方式，视频解码程序，视频解码集成电路公开(公告)号：US20060239354A1
公开(公告)日：2006-10-26
申请号：US11393426
申请日：2006-03-30
申请人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
发明人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
CPC分类号： H04N19/513 , H04N19/122 , H04N19/176 , H04N19/182 , H04N19/44 , H04N19/51 , H04N19/583 , H04N19/61 , H04N19/70
摘要： With use of a simplified program or calculating device for motion compensation, a video decoding device decodes video data compressed by motion detection operations on macroblock units, as in the MPEG-4AVC standard. The video decoding device splits compressed data blocks of the prescribed size, 16×16 pixels for instance, to generate sub-blocks, which are smaller than the blocks and on which the video decoding device is able to execute motion compensation operations. The video decoding device duplicates a motion vector assigned to a given block to generate as many motion vectors as there are sub-blocks in the given block, and executes motion compensation on each sub-block using the corresponding duplicate motion vector. Data resulting from the motion compensation operation on each sub-block is combined to obtain a target block corresponding to the given block.
摘要翻译： 通过使用用于运动补偿的简化程序或计算装置，视频解码装置如在MPEG-4AVC标准中解码通过宏块单元上的运动检测操作压缩的视频数据。 视频解码装置将规定尺寸的压缩数据块例如16×16像素分割，生成小于块的子块，视频解码装置能够进行运动补偿动作。 视频解码装置复制分配给给定块的运动矢量以产生与给定块中的子块一样多的运动矢量，并且使用相应的重复运动矢量对每个子块执行运动补偿。 对每个子块的运动补偿操作产生的数据进行组合以获得与给定块对应的目标块。
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5.发明授权Video decoding device, video decoding method, video decoding program, and video decoding integrated circuit 有权视频解码装置，视频解码方式，视频解码程序，视频解码集成电路公开(公告)号：US08588304B2
公开(公告)日：2013-11-19
申请号：US11393426
申请日：2006-03-30
申请人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
发明人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
IPC分类号： H04N7/12
CPC分类号： H04N19/513 , H04N19/122 , H04N19/176 , H04N19/182 , H04N19/44 , H04N19/51 , H04N19/583 , H04N19/61 , H04N19/70
摘要： With use of a simplified program or calculating device for motion compensation, a video decoding device decodes video data compressed by motion detection operations on macroblock units, as in the MPEG-4AVC standard. The video decoding device splits compressed data blocks of the prescribed size, 16×16 pixels for instance, to generate sub-blocks, which are smaller than the blocks and on which the video decoding device is able to execute motion compensation operations. The video decoding device duplicates a motion vector assigned to a given block to generate as many motion vectors as there are sub-blocks in the given block, and executes motion compensation on each sub-block using the corresponding duplicate motion vector. Data resulting from the motion compensation operation on each sub-block is combined to obtain a target block corresponding to the given block.
摘要翻译： 通过使用用于运动补偿的简化程序或计算装置，视频解码装置如在MPEG-4AVC标准中解码通过宏块单元上的运动检测操作压缩的视频数据。 视频解码装置将规定尺寸的压缩数据块例如16×16像素分割，生成小于块的子块，视频解码装置能够执行运动补偿操作。 视频解码装置复制分配给给定块的运动矢量以产生与给定块中的子块一样多的运动矢量，并且使用相应的重复运动矢量对每个子块执行运动补偿。 对每个子块的运动补偿操作产生的数据进行组合以获得与给定块对应的目标块。
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公开(公告)号：US20120202342A1
公开(公告)日：2012-08-09
申请号：US13450329
申请日：2012-04-18
申请人： Kouji NAKAJIMA
发明人： Kouji NAKAJIMA
IPC分类号： H01L21/283
CPC分类号： H01L29/7802 , H01L21/823475 , H01L29/1095 , H01L29/4238 , H01L29/4925 , H01L29/66712 , H01L29/7811 , H01L29/7813
摘要： A method of manufacturing a semiconductor device includes depositing a wiring metal layer on a photoresist layer and a portion of a first layer of a gate lead-out electrode which is exposed via an opening, lifting-off a wiring metal layer formed on the photoresist layer forming an interlayer insulation film over the entire surface including the first layer and the wiring metal layer, selectively removing the interlayer insulation film thereby forming a contact via reaching a source region formed in a cell region, and forming a source electrode on the interlayer insulation film and electrically connecting a source electrode with the source region.
摘要翻译： 一种制造半导体器件的方法包括在光致抗蚀剂层上沉积布线金属层和通过开口露出的栅极引出电极的第一层的一部分，提起形成在光致抗蚀剂层上的布线金属层 在包括第一层和布线金属层的整个表面上形成层间绝缘膜，选择性地去除层间绝缘膜，从而通过到达形成在电池区域中的源极区域形成接触，并且在层间绝缘膜上形成源电极 并且将源极电极与源极区域电连接。
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公开(公告)号：US08183645B2
公开(公告)日：2012-05-22
申请号：US12588392
申请日：2009-10-14
申请人： Kouji Nakajima
发明人： Kouji Nakajima
IPC分类号： H01L21/70
CPC分类号： H01L29/7802 , H01L21/823475 , H01L29/1095 , H01L29/4238 , H01L29/4925 , H01L29/66712 , H01L29/7811 , H01L29/7813
摘要： Flexibility for the design of the pattern layout of the gate lead-out electrode and the source electrode is enhanced without increasing the chip thickness of the semiconductor device. A semiconductor device includes a cell region where plural transistor cells are arranged and a gate finger region different from a region where the cell region is formed. In the cell region, a gate electrode formed of a polysilicon (first conductive material) is formed. A polysilicon layer formed indivisibly with the gate electrode is formed in the gate finger region. An adhesion metal layer and a wiring metal layer are formed above the polysilicon layer by a lift-off method. The gate lead-out electrode is formed of a laminate structure including the polysilicon layer, the adhesion metal layer, and the wiring metal layer. A single layer of interlayer insulation film covering them is formed, on which a source electrode is formed.
摘要翻译： 在不增加半导体器件的芯片厚度的情况下，增强了栅极引出电极和源电极的图案布局设计的灵活性。 半导体器件包括布置多个晶体管单元的单元区域和与形成单元区域的区域不同的栅极指状区域。 在单元区域中，形成由多晶硅（第一导电材料）形成的栅电极。 在栅指区域中形成与栅电极不可分割地形成的多晶硅层。 通过剥离法在多晶硅层的上方形成粘附金属层和布线金属层。 栅极引出电极由包括多晶硅层，粘合金属层和布线金属层的层叠结构形成。 形成覆盖它们的单层层间绝缘膜，在其上形成源电极。
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8.发明申请VIDEO DECODING DEVICE, VIDEO DECODING METHOD, VIDEO DECODING PROGRAM, AND VIDEO DECODING INTEGRATED CIRCUIT 有权视频解码设备，视频解码方法，视频解码程序和视频解码集成电路公开(公告)号：US20120087413A1
公开(公告)日：2012-04-12
申请号：US13328950
申请日：2011-12-16
申请人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
发明人： Hiroshi Amano , Takeshi Tanaka , Kouji Nakajima , Eiji Otomura
CPC分类号： H04N19/513 , H04N19/122 , H04N19/176 , H04N19/182 , H04N19/44 , H04N19/51 , H04N19/583 , H04N19/61 , H04N19/70
摘要： With use of a simplified program or calculating device for motion compensation, a video decoding device decodes video data compressed by motion detection operations on macroblock units, as in the MPEG-4AVC standard. The video decoding device splits compressed data blocks of the prescribed size, 16×16 pixels for instance, to generate sub-blocks, which are smaller than the blocks and on which the video decoding device is able to execute motion compensation operations. The video decoding device duplicates a motion vector assigned to a given block to generate as many motion vectors as there are sub-blocks in the given block, and executes motion compensation on each sub-block using the corresponding duplicate motion vector. Data resulting from the motion compensation operation on each sub-block is combined to obtain a target block corresponding to the given block.
摘要翻译： 通过使用用于运动补偿的简化程序或计算装置，视频解码装置如在MPEG-4AVC标准中解码通过宏块单元上的运动检测操作压缩的视频数据。 视频解码装置将规定尺寸的压缩数据块例如16×16像素分割，生成小于块的子块，视频解码装置能够执行运动补偿操作。 视频解码装置复制分配给给定块的运动矢量以产生与给定块中的子块一样多的运动矢量，并且使用相应的重复运动矢量对每个子块执行运动补偿。 对每个子块的运动补偿操作产生的数据进行组合以获得与给定块对应的目标块。
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公开(公告)号：US20110062545A1
公开(公告)日：2011-03-17
申请号：US12884448
申请日：2010-09-17
申请人： Kouji NAKAJIMA
发明人： Kouji NAKAJIMA
CPC分类号： H01L29/66712 , H01L27/0255 , H01L27/0629 , H01L29/66136 , H01L29/7804 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device in accordance with the present invention includes a diode 7 that is formed on a semiconductor substrate and serves as a temperature detection element to detect abnormal heat generation, and a thermal conduction layer 102 that is formed between the diode 7 and the semiconductor substrate and has a thermal conductivity higher than that of the semiconductor substrate. In this way, heat generated in a heat generating portion can be swiftly and uniformly conducted over the entire temperature detection element composed of the diode 7 with efficiency. In this way, a semiconductor device capable of detecting temperature with excellent response by the temperature detection element and its manufacturing method can be provided.
摘要翻译： 根据本发明的半导体器件包括形成在半导体衬底上并用作检测异常发热的温度检测元件的二极管7和形成在二极管7和半导体衬底之间的导热层102 并且具有比半导体衬底高的导热性。 以这种方式，可以有效地在由二极管7组成的整个温度检测元件上快速且均匀地传导在发热部分中产生的热量。 以这种方式，可以提供能够通过温度检测元件检测出具有良好响应的温度的半导体器件及其制造方法。
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公开(公告)号：US20070052852A1
公开(公告)日：2007-03-08
申请号：US11513354
申请日：2006-08-31
CPC分类号： G09G5/393 , G09G5/18 , G09G5/395 , G09G2320/106 , H04N7/0122
摘要： An address generating unit 102 generates a different write start address (w_adr) of a picture memory 105 depending on an aspect ratio and/or a display plane position of a motion picture to be displayed. A picture writing unit 104 writes data to the picture memory 105, starting at the calculated write start address (w_adr). A picture reading unit 108 uses the write start address (w_adr) as a read start address (r_adr) and reads data from the picture memory 105, starting at the read start address (r_adr).
摘要翻译： 地址生成单元102根据要显示的运动图像的宽高比和/或显示平面位置生成图片存储器105的不同的写入开始地址（w_adr）。 图像写入单元104从计算出的写开始地址（w_adr）开始将数据写入图像存储器105。 图像读取单元108使用写开始地址（w_adr）作为读取开始地址（r_adr），并从读取的起始地址（r_adr）开始从图片存储器105读取数据。
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