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    Programmable data readout for an optical sensor
    2.
    发明授权
    Programmable data readout for an optical sensor 有权
    用于光学传感器的可编程数据读出

    公开(公告)号：US08610790B2

    公开(公告)日：2013-12-17

    申请号：US13217797

    申请日：2011-08-25

    Applicant: Laurent Blanquart ,  John D. Wallner ,  Qianjiang Mao

    Inventor： Laurent Blanquart ,  John D. Wallner ,  Qianjiang Mao

    IPC: H04N5/225

    CPC classification number: H04N5/343 ,  H04N5/3452 ,  H04N5/347

    Abstract: Programmable data readout for optical image sensors is disclosed herein. By way of example, vertical skipping and vertical mixing functionality is provided that is responsive to commands, enabling dynamic selectivity and processing of optical sensor data. A data output control system can be incorporated with or coupled to data readout circuitry of an optical sensor. The output control system comprises a vertical skipping engine that can dynamically select a subset of data for output in response to one or more skipping commands, and a vertical mixing engine that can act upon subsets of data in accordance with processing functions called by respective mixing commands. The disclosure provides simplification of selective data readout and processing for image sensors, potentially reducing design, testing, and maintenance overhead, as well as cost and number of integrated circuit components.

    Abstract translation: 本文公开了用于光学图像传感器的可编程数据读出。 作为示例，提供垂直跳跃和垂直混合功能，其响应命令，实现光学传感器数据的动态选择性和处理。 数据输出控制系统可以结合或耦合到光学传感器的数据读出电路。 输出控制系统包括垂直跳过引擎，其可以响应于一个或多个跳过命令来动态地选择用于输出的数据子集;以及垂直混合引擎，其可以根据由各个混合命令调用的处理函数而对数据子集执行操作 。 该公开提供了用于图像传感器的选择性数据读出和处理的简化，可能降低设计，测试和维护开销，以及集成电路组件的成本和数量。

    Sub-frame tapered reset
    3.
    发明授权
    Sub-frame tapered reset 有权
    子框架锥形复位

    公开(公告)号：US08488025B2

    公开(公告)日：2013-07-16

    申请号：US12582316

    申请日：2009-10-20

    Applicant: Ying Huang ,  Giuseppe Rossi ,  Lester Joseph Kozlowski ,  Laurent Blanquart ,  Qianjiang Mao ,  Gregory Chow

    Inventor： Ying Huang ,  Giuseppe Rossi ,  Lester Joseph Kozlowski ,  Laurent Blanquart ,  Qianjiang Mao ,  Gregory Chow

    IPC: H04N5/217 ,  H04N5/335

    CPC classification number: H04N5/363 ,  H04N5/343 ,  H04N5/3532 ,  H04N5/374 ,  H04N5/3765

    Abstract: Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.

    Abstract translation: 提供了系统和方法，其便于对CMOS传感器成像器的像素阵列中的像素列采用多个独立的复位总线。 对于像素列，多个独立复位总线的利用可以使得在采用子帧集成时能够实现独立的复位。 例如，可以基于一个或多个标准来选择在给定的读出时间间隔期间要读取和复位的行。 此外，在给定读出时间间隔期间选择的每行都可以与相应的不同的复位总线相关联。 通过利用多个独立的复位总线，无论是在全帧集成模式还是子帧集成模式下操作，都可以保持像素操作的均匀性。 因此，可以通过使用多个独立复位总线来减轻由积分模式之间变化引起的噪声。

    Pixel or column fixed pattern noise mitigation using partial or full frame correction with uniform frame rates
    7.
    发明授权
    Pixel or column fixed pattern noise mitigation using partial or full frame correction with uniform frame rates 有权
    使用部分或全帧校正，具有统一的帧速率的像素或列固定模式噪声抑制

    公开(公告)号：US08164657B2

    公开(公告)日：2012-04-24

    申请号：US12163211

    申请日：2008-06-27

    Applicant: Laurent Blanquart

    Inventor： Laurent Blanquart

    IPC: H04N5/217 ,  H04N5/228 ,  H04N5/235 ,  H04N9/64 ,  H04N5/335

    CPC classification number: H04N5/2351 ,  H04N5/353

    Abstract: Systems and methods are provided that facilitate mitigating pixel or column fixed pattern noise in a CMOS imaging System-on-Chip (iSoC) sensor. For instance, pixel or column fixed pattern noise can be recognized by gating a pixel array without firing a transfer signal (TX). Inhibiting the transfer signal can cause zero input to be provided to pixels in the pixel array; thus, the sampled output from the pixels under such conditions can be a function of noise. Calibration and correction can thereafter be effectuated. Moreover, uniform frame rates for outputted frames can be yielded irrespective of use of a subset of read out frames for calibration. For example, frames employed for calibration can be replaced in a sequence of outputted frames by copies of stored frames. Further, signal levels can be balanced to account for differences in light integration time, which can result from blocking and unblocking firing of transfer signals.

    Abstract translation: 提供了系统和方法，其有助于减轻CMOS成像片上系统（iSoC）传感器中的像素或列固定模式噪声。 例如，可以通过选通像素阵列而不触发传输信号（TX）来识别像素或列固定图案噪声。 抑制传送信号可以使零输入被提供给像素阵列中的像素; 因此，在这种条件下来自像素的采样输出可以是噪声的函数。 此后可进行校准和校正。 此外，无论使用用于校准的读出帧的子集，都可以产生输出帧的均匀帧速率。 例如，用于校准的帧可以通过存储帧的副本以输出帧序列替换。 此外，可以平衡信号电平以解决光积分时间的差异，这可能由于传输信号的阻塞和解除阻塞而产生。

    SUB-FRAME TAPERED RESET
    8.
    发明申请
    SUB-FRAME TAPERED RESET 有权
    子框复位

    公开(公告)号：US20110090374A1

    公开(公告)日：2011-04-21

    申请号：US12582316

    申请日：2009-10-20

    Applicant: Ying Huang ,  Giuseppe Rossi ,  Lester Joseph Kozlowski ,  Laurent Blanquart ,  Qianjiang Mao ,  Gregory Chow

    Inventor： Ying Huang ,  Giuseppe Rossi ,  Lester Joseph Kozlowski ,  Laurent Blanquart ,  Qianjiang Mao ,  Gregory Chow

    IPC: H04N5/217 ,  H04N5/335

    CPC classification number: H04N5/363 ,  H04N5/343 ,  H04N5/3532 ,  H04N5/374 ,  H04N5/3765

    Abstract: Systems and methods are provided that facilitate employing a plurality of independent reset buses for a column of pixels in a pixel array of a CMOS sensor imager. Utilization of the plurality of independent reset buses for the column of pixels can enable independent reset to be effectuated when employing sub-frame integration. For example, rows to be read and reset during a given readout time interval can be selected based upon one or more criteria. Further, each of the rows selected during the given readout time interval can be associated with a respective distinct reset bus. By leveraging the plurality of independent reset buses, uniformity in pixel operation can be maintained whether operating in full frame integration mode or sub-frame integration mode. Thus, noise resultant from changing between integration modes can be mitigated by using the plurality of independent reset buses.

    Abstract translation: 提供了系统和方法，其便于对CMOS传感器成像器的像素阵列中的像素列采用多个独立的复位总线。 对于像素列，多个独立复位总线的利用可以使得在采用子帧集成时能够实现独立的复位。 例如，可以基于一个或多个标准来选择在给定的读出时间间隔期间要读取和复位的行。 此外，在给定读出时间间隔期间选择的每行都可以与相应的不同的复位总线相关联。 通过利用多个独立的复位总线，无论是在全帧集成模式还是子帧集成模式下操作，都可以保持像素操作的均匀性。 因此，可以通过使用多个独立复位总线来减轻由积分模式之间变化引起的噪声。

    Dark current and lag reduction
    9.
    发明授权
    Dark current and lag reduction 失效
    暗电流和滞后减少

    公开(公告)号：US07834306B2

    公开(公告)日：2010-11-16

    申请号：US12053670

    申请日：2008-03-24

    Applicant: Joey Shah ,  Laurent Blanquart

    Inventor： Joey Shah ,  Laurent Blanquart

    IPC: H03F3/08 ,  H01L27/00 ,  H04N3/14

    CPC classification number: H04N5/378

    Abstract: The claimed subject matter provides systems and/or methods that facilitate reducing dark current and lag in a CMOS imaging System-on-Chip (iSoC) sensor. For instance, a vertical output driver can output a signal upon a node connected to gates of reset transistors and/or gates of transfer transistors of pixels in the pixel array while operating in rolling shutter mode and/or global shutter mode. Further, a pre-charger can transition a voltage of the node to a first voltage level. Moreover, a booster can further adjust the voltage of the node from the first voltage level to a second voltage level. The booster can have variable drive capability that enables varying operation thereof according to at least one degree of freedom (e.g., speed of the booster proceeding to the second voltage level, frequency of yielding charge to the node, the second voltage level, or timing of the booster and the pre-charger, . . . ).

    Abstract translation: 所要求保护的主题提供了有助于减少CMOS成像片上系统（iSoC）传感器中的暗电流和滞后的系统和/或方法。 例如，垂直输出驱动器可以在以滚动快门模式和/或全局快门模式操作时在连接到像素阵列中的像素的传输晶体管的复位晶体管的栅极和/或栅极的节点上输出信号。 此外，预充电器可以将节点的电压转换到第一电压电平。 此外，升压器可以进一步将节点的电压从第一电压电平调整到第二电压电平。 升压器可以具有可变驱动能力，其能够根据至少一个自由度（例如，升压器进入第二电压电平的速度，向节点产生电荷的频率，第二电压电平或第 增压器和预充电器，...）。

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