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公开(公告)号：US08150339B2
公开(公告)日：2012-04-03
申请号：US11935200
申请日：2007-11-05
CPC分类号： H04B1/0475 , H03F1/02 , H03F1/0244 , H03F3/24 , H03F3/45475 , H03F2203/45731 , H04B1/0057 , H04B1/406 , H04B2001/045
摘要： Switchable voltage level supplies for circuitry in a multi-mode communications chipset are disclosed. In an embodiment, a first voltage level is supplied to TX circuitry operating in a first mode having a first set of linearity and/or noise requirements. A second voltage level lower than the first voltage level is supplied to TX circuitry operating in a second mode having a second set of linearity and/or noise requirements looser than the first set of requirements. The first mode may be operation according to the GSM standard, and the second mode may be operation according to the W-CDMA standard.
摘要翻译： 公开了一种用于多模式通信芯片组中的电路的可切换电压电平。 在一个实施例中，向具有第一组线性和/或噪声要求的第一模式工作的TX电路提供第一电压电平。 低于第一电压电平的第二电压电平被提供给具有比第一组要求松动的第二组线性和/或噪声要求的第二模式工作的TX电路。 第一模式可以是根据GSM标准的操作，并且第二模式可以是根据W-CDMA标准的操作。
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公开(公告)号：US08022772B2
公开(公告)日：2011-09-20
申请号：US12407729
申请日：2009-03-19
IPC分类号： H03F1/22
CPC分类号： H03F1/223 , H03F1/523 , H03F3/211 , H03F3/72 , H03F2200/27 , H03F2200/294 , H03F2203/7206 , H03F2203/7215 , H03F2203/7236 , H03G1/0088
摘要： A cascode amplifier with protection circuitry is described. In one exemplary design, the amplifier includes multiple branches coupled in parallel, with at least one branch being switchable between “on” and “off” states. Each switchable branch includes a gain transistor coupled to a cascode transistor. The gain transistor amplifies an input signal and provides an amplified signal in the on state and does not amplify the input signal in the off state. The cascode transistor buffers the amplified signal and provides an output signal in the on state. The output signal swing may be split between the gain transistor and the cascode transistor in both the on and off states with the protection circuitry. Each transistor may then observe a fraction of the voltage swing. The voltage splitting in the off state may be achieved by floating the gain transistor and shorting the gate and source of the cascode transistor.
摘要翻译： 描述了具有保护电路的共源共栅放大器。 在一个示例性设计中，放大器包括并联耦合的多个分支，至少一个分支可在“开”和“关”状态之间切换。 每个可切换分支包括耦合到共源共栅晶体管的增益晶体管。 增益晶体管放大输入信号，并将放大的信号提供为导通状态，并且不将输入信号放大在关闭状态。 共源共栅晶体管缓冲放大的信号，并提供处于导通状态的输出信号。 在保护电路中，输出信号摆幅可以在开关状态和断开状态之间在增益晶体管和共源共栅晶体管之间分开。 然后，每个晶体管可以观察电压摆幅的一小部分。 断开状态下的分压可以通过使增益晶体管浮置并使共源共栅晶体管的栅极和源极短路来实现。
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公开(公告)号：US09559639B2
公开(公告)日：2017-01-31
申请号：US12715250
申请日：2010-03-01
CPC分类号： H03F1/52 , H03F3/24 , H03F2200/435 , H03F2200/78 , H03G3/3042 , H04B2001/0408
摘要： Techniques for protecting a power amplifier (PA) are described. In an exemplary design, an apparatus includes (i) a PA module to amplify an input RF signal and provide an output RF signal and (ii) a protection circuit to control a transmitter gain to protect the PA module against high peak voltage. In an exemplary design, the protection circuit includes a set of comparators to quantize an analog input signal and provide digital comparator output signals used to adjust the transmitter gain. In another exemplary design, the protection circuit reduces and increases the transmitter gain with hysteresis. In yet another exemplary design, the protection circuit has faster response to rising amplitude than falling amplitude of the output RF signal. The hysteresis and/or the different rise and fall responses may allow the protection circuit to avoid toggling the transmitter gain under severe load mismatch and to handle time-varying envelope due to amplitude modulation.
摘要翻译： 描述了用于保护功率放大器（PA）的技术。 在示例性设计中，装置包括（i）PA模块，用于放大输入RF信号并提供输出RF信号，以及（ii）保护电路以控制发射机增益以保护PA模块免受高峰值电压。 在示例性设计中，保护电路包括一组比较器，用于量化模拟输入信号并提供用于调整发射机增益的数字比较器输出信号。 在另一示例性设计中，保护电路通过滞后减小并增加发射机增益。 在又一示例性设计中，保护电路比对输出RF信号的下降幅度具有对振幅上升的响应更快。 迟滞和/或不同的上升和下降响应可以允许保护电路避免在严重负载不匹配的情况下切换发射机增益，并且由于幅度调制来处理时变包络。
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公开(公告)号：US08971830B2
公开(公告)日：2015-03-03
申请号：US12575414
申请日：2009-10-07
申请人： Aristotle Hadjichristos , Puay Hoe See , Babak Nejati , Guy Klemens , Norman L Frederick, Jr. , Gurkanwal S Sahota , Marco Cassia , Nathan M Pletcher , Yu Zhao , Thomas A Myers
发明人： Aristotle Hadjichristos , Puay Hoe See , Babak Nejati , Guy Klemens , Norman L Frederick, Jr. , Gurkanwal S Sahota , Marco Cassia , Nathan M Pletcher , Yu Zhao , Thomas A Myers
CPC分类号： H04B1/0458 , H03F1/0277 , H03F3/24 , H03F3/72 , H03F2203/7236 , H04B1/0483
摘要： A multi-mode multi-band power amplifier (PA) module is described. In an exemplary design, the PA module includes multiple power amplifiers, multiple matching circuits, and a set of switches. Each power amplifier provides power amplification for its input signal when selected. Each matching circuit provides impedance matching and filtering for its power amplifier and provides a respective output signal. The switches configure the power amplifiers to support multiple modes, with each mode being for a particular radio technology. Each power amplifier supports at least two modes. The PA module may further include a driver amplifier and an additional matching circuit. The driver amplifier amplifies an input signal and provides an amplified signal to the power amplifiers. The additional matching circuit combines the outputs of other matching circuits and provides an output signal with higher output power. The driver amplifier and the power amplifiers can support multiple output power levels.
摘要翻译： 描述了多模式多频带功率放大器（PA）模块。 在示例性设计中，PA模块包括多个功率放大器，多个匹配电路和一组开关。 每个功率放大器在选择时为其输入信号提供功率放大。 每个匹配电路为其功率放大器提供阻抗匹配和滤波，并提供相应的输出信号。 这些开关配置功率放大器以支持多种模式，每种模式都适用于特定的无线电技术。 每个功率放大器至少支持两种模式。 PA模块还可以包括驱动器放大器和附加匹配电路。 驱动器放大器放大输入信号并向功率放大器提供放大的信号。 附加匹配电路组合其他匹配电路的输出，并提供具有较高输出功率的输出信号。 驱动器放大器和功率放大器可以支持多个输出功率电平。
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公开(公告)号：US08310277B2
公开(公告)日：2012-11-13
申请号：US12718806
申请日：2010-03-05
IPC分类号： H03K5/153
CPC分类号： G01R19/04
摘要： A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.
摘要翻译： 描述具有可变偏置电流和/或可变偏置电压的高线性快速峰值检测器。 在示例性设计中，峰值检测器包括晶体管，可变电流源，电容器和反馈电路。 晶体管接收输入信号并提供源极电流。 可变电流源接收输入信号，当输入信号为低电平时提供高偏置电流，并且当输入信号为高电平时提供低偏置电流。 当输入信号为高电平时，电容器由电源电流充电，当输入信号为低电平时，电容器被高偏置电流放电。 当输入信号为高电平时，反馈电路接收来自电容器的检测信号，并为晶体管提供较高的偏置电压，这导致来自晶体管的较高的源极电流。
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6.发明授权Multiple multi-mode low-noise amplifier receiver with shared degenerative inductors 失效具有共享退化电感的多模多低频放大器接收器公开(公告)号：US08175566B2
公开(公告)日：2012-05-08
申请号：US12478675
申请日：2009-06-04
申请人： Aleksandar M. Tasic , Marco Cassia
发明人： Aleksandar M. Tasic , Marco Cassia
IPC分类号： H04B1/10
CPC分类号： H04B1/406 , H03F3/195 , H03F3/45179 , H03F3/45475 , H03F3/72 , H03F2203/45386 , H03F2203/45394 , H03F2203/7209
摘要： A device with multiple multi-mode low-noise amplifiers (LNAs), each with common operating modes and separate operating frequency bands, are coupled to shared degenerative inductors for common operating modes. Common load inductors are coupled to the multi-mode LNA outputs to reduce the number of load inductors required. The multi-mode LNAs have parallel transistor gain stages and form part of an integrated circuit (IC) for use in a wireless communication receiver. Each multi-mode LNA has the capability to switch between at least one higher linearity transistor gain stage and at least one lower linearity transistor gain stage for different operating modes. Multiple lower linearity transistor gain stages for different multi-mode LNAs may be merged into a single lower linearity transistor gain stage shared among multiple multi-mode LNAs through multiple RF switches between a set of common RF inputs and common inputs and common input matching networks.
摘要翻译： 具有多个多模低噪声放大器（LNA）的器件，每个具有共同的工作模式和独立的工作频带，被耦合到用于常见工作模式的共享退化电感器。 常见的负载电感器耦合到多模LNA输出，以减少所需的负载电感器的数量。 多模LNA具有并联晶体管增益级并且构成用于无线通信接收机的集成电路（IC）的一部分。 每个多模式LNA具有在至少一个较高线性度晶体管增益级与用于不同操作模式的至少一个较低线性度晶体管增益级之间切换的能力。 用于不同多模LNA的多个下线性晶体管增益级可以通过一组公共RF输入和公共输入和公共输入匹配网络之间的多个RF开关合并到多个多模LNA之间共享的单个下线性晶体管增益级中。
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公开(公告)号：US08160514B2
公开(公告)日：2012-04-17
申请号：US12180350
申请日：2008-07-25
CPC分类号： H04B1/0475 , H03F1/34 , H03F3/24 , H04B2001/0433
摘要： Exemplary embodiments of the disclosure are directed to down-converting an RF signal of a transmitter to baseband, filtering the down-converted signal, and generating a composite signal based on the filtered down-converted signal and a transmission based-band signal.
摘要翻译： 本公开的示例性实施例涉及将发射机的RF信号下变频到基带，对下变频信号进行滤波，并且基于滤波的下变频信号和基于传输的频带信号来生成复合信号。
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公开(公告)号：US20110050285A1
公开(公告)日：2011-03-03
申请号：US12718806
申请日：2010-03-05
IPC分类号： G01R19/04
CPC分类号： G01R19/04
摘要： A high linear fast peak detector having a variable bias current and/or a variable bias voltage is described. In an exemplary design, the peak detector includes a transistor, a variable current source, a capacitor, and a feedback circuit. The transistor receives the input signal and provides a source current. The variable current source receives the input signal, provides high bias current when the input signal is low, and provides low bias current when the input signal is high. The capacitor is charged by the source current when the input signal is high and is discharged by the high bias current when the input signal is low. The feedback circuit receives a detected signal from the capacitor and provides higher bias voltage for the transistor when the input signal is high, which results in higher source current from the transistor.
摘要翻译： 描述具有可变偏置电流和/或可变偏置电压的高线性快速峰值检测器。 在示例性设计中，峰值检测器包括晶体管，可变电流源，电容器和反馈电路。 晶体管接收输入信号并提供源极电流。 可变电流源接收输入信号，当输入信号为低电平时提供高偏置电流，并且当输入信号为高电平时提供低偏置电流。 当输入信号为高电平时，电容器由电源电流充电，当输入信号为低电平时，电容器被高偏置电流放电。 当输入信号为高电平时，反馈电路接收来自电容器的检测信号，并为晶体管提供更高的偏置电压，这导致来自晶体管的较高的源极电流。
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公开(公告)号：US20110025408A1
公开(公告)日：2011-02-03
申请号：US12615107
申请日：2009-11-09
申请人： Marco Cassia , Jeremy D. Dunworth
发明人： Marco Cassia , Jeremy D. Dunworth
IPC分类号： G05F3/02
CPC分类号： H03K17/102 , H03F3/72 , H03K17/693 , H03K2217/0018
摘要： Switches with connected bulk for improved switching performance and bias resistors for even voltage distribution to improve reliability are described. In an exemplary design, a switch may include a plurality of transistors coupled in a stack and at least one resistor coupled to at least one intermediate node in the stack. The transistors may have (i) a first voltage applied to a first transistor in the stack and (ii) a second voltage that is lower than the first voltage applied to bulk nodes of the transistors. The resistor(s) may maintain matching bias conditions for the transistors when they are turned off. In one exemplary design, one resistor may be coupled between the source and drain of each transistor. In another exemplary design, one resistor may be coupled between each intermediate node and the first voltage. The resistor(s) may maintain the source of each transistor at the first voltage.
摘要翻译： 描述了具有连接体积的开关，用于提高开关性能和用于均匀电压分配的偏置电阻器以提高可靠性。 在示例性设计中，开关可以包括耦合在堆叠中的多个晶体管和耦合到堆叠中的至少一个中间节点的至少一个电阻器。 晶体管可以具有（i）施加到堆叠中的第一晶体管的第一电压和（ii）低于施加到晶体管的体节点的第一电压的第二电压。 当晶体管关断时，电阻可以保持晶体管的匹配偏置条件。 在一个示例性设计中，一个电阻器可以耦合在每个晶体管的源极和漏极之间。 在另一示例性设计中，一个电阻器可以耦合在每个中间节点和第一电压之间。 电阻器可以将每个晶体管的源极保持在第一电压。
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10.发明申请MULTIPLE MULTI-MODE LOW-NOISE AMPLIFIER RECEIVER WITH SHARED DEGENERATIVE INDUCTORS 失效多模式多通道低噪声放大器接收器，具有共享衰减电感公开(公告)号：US20100311378A1
公开(公告)日：2010-12-09
申请号：US12478675
申请日：2009-06-04
申请人： Aleksandar M. Tasic , Marco Cassia
发明人： Aleksandar M. Tasic , Marco Cassia
CPC分类号： H04B1/406 , H03F3/195 , H03F3/45179 , H03F3/45475 , H03F3/72 , H03F2203/45386 , H03F2203/45394 , H03F2203/7209
摘要： A device with multiple multi-mode low-noise amplifiers (LNAs), each with common operating modes and separate operating frequency bands, are coupled to shared degenerative inductors for common operating modes. Common load inductors are coupled to the multi-mode LNA outputs to reduce the number of load inductors required. The multi-mode LNAs have parallel transistor gain stages and form part of an integrated circuit (IC) for use in a wireless communication receiver. Each multi-mode LNA has the capability to switch between at least one higher linearity transistor gain stage and at least one lower linearity transistor gain stage for different operating modes. Multiple lower linearity transistor gain stages for different multi-mode LNAs may be merged into a single lower linearity transistor gain stage shared among multiple multi-mode LNAs through multiple RF switches between a set of common RF inputs and common inputs and common input matching networks.
摘要翻译： 具有多个多模低噪声放大器（LNA）的器件，每个具有共同的工作模式和独立的工作频带，耦合到用于常见工作模式的共享退化电感器。 常见的负载电感器耦合到多模LNA输出，以减少所需的负载电感器的数量。 多模LNA具有并联晶体管增益级并且构成用于无线通信接收机的集成电路（IC）的一部分。 每个多模式LNA具有在至少一个较高线性度晶体管增益级与用于不同操作模式的至少一个较低线性度晶体管增益级之间切换的能力。 用于不同多模LNA的多个下线性晶体管增益级可以通过一组公共RF输入和公共输入和公共输入匹配网络之间的多个RF开关合并到多个多模LNA之间共享的单个下线性晶体管增益级中。
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