公开(公告)号：US5518940A

公开(公告)日：1996-05-21

申请号：US368906

申请日：1995-01-05

申请人： Mari Hodate ,  Norihisa Matsumoto ,  Kohji Ohgata ,  Tamotsu Wada ,  Ken-iti Yanai ,  Ken-ichi Oki ,  Yasuyoshi Mishima ,  Michiko Takei ,  Tatsuya Kakehi ,  Masahiro Okabe

发明人： Mari Hodate ,  Norihisa Matsumoto ,  Kohji Ohgata ,  Tamotsu Wada ,  Ken-iti Yanai ,  Ken-ichi Oki ,  Yasuyoshi Mishima ,  Michiko Takei ,  Tatsuya Kakehi ,  Masahiro Okabe

IPC分类号： G02F1/1362 ,  H01L21/265 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L21/8232

CPC分类号： H01L29/66757 ,  G02F1/13454 ,  H01L29/66575 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/78621 ,  Y10S438/948

摘要： A method of manufacturing a semiconductor device according to the present invention includes a process of introducing impurities into a semiconductor layer with a gate electrode and a resist film as a mask after a resist film is formed on the top and the side of the gate electrode by soaking the gate electrode on a semiconductor layer in an electrolyte containing resist and applying voltage to the gate electrode.

摘要翻译： 根据本发明的制造半导体器件的方法包括在栅电极的顶部和侧面上形成抗蚀剂膜之后，将杂质引入到具有栅电极和抗蚀剂膜作为掩模的半导体层中的工艺， 将栅极电极浸入含有抗蚀剂的电解质的半导体层上并向栅电极施加电压。

公开(公告)号：US5480818A

公开(公告)日：1996-01-02

申请号：US15512

申请日：1993-02-09

申请人： Tomotaka Matsumoto ,  Jun Inoue ,  Teruhiko Ichimura ,  Yuji Murata ,  Junichi Watanabe ,  Yoshio Nagahiro ,  Mari Hodate ,  Kenichi Oki ,  Masahiro Okabe

发明人： Tomotaka Matsumoto ,  Jun Inoue ,  Teruhiko Ichimura ,  Yuji Murata ,  Junichi Watanabe ,  Yoshio Nagahiro ,  Mari Hodate ,  Kenichi Oki ,  Masahiro Okabe

IPC分类号： H01L21/205 ,  H01L21/336 ,  H01L21/86 ,  H01L29/78 ,  H01L29/786

CPC分类号： C23C16/45525 ,  C23C16/403 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/86 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/7833 ,  H01L29/78621 ,  H01L29/78675 ,  H01L29/78678 ,  Y10S148/15 ,  Y10S148/169

摘要： A crystal silicon film deposited on an insulating film made of a binary system material or a binary system semiconductor film formed by an atomic layer deposition method has a grain as large as approximately 200 nm. Thus, the mobility of carriers is increased. The crystal silicon thereof is grown within a temperature range of 250.degree. C. to 400.degree. C. Accordingly, when a planar type thin film transistor, an inverted stagger type thin film transistor or a stagger type thin film transistor is formed using crystal silicon formed on these films made of a binary system material, transistor characteristics thereof are improved. Further, when an impurity containing silicon film is formed by a chemical vapor deposition method between a source electrode and a drain electrode of a thin film transistor and a silicon film connected to these electrodes, and a flow rate of impurity containing gas is regulated so that impurity density becomes larger as approaching to the source electrode and the drain electrode, a leakage current in an OFF-state of the transistor is reduced. Since the impurity containing silicon film is grown by a chemical vapor deposition method in this case, the impurity density thereof can be controlled easily and the control accuracy is also improved.

摘要翻译： 沉积在由二元系材料制成的绝缘膜上的晶体硅膜或通过原子层沉积法形成的二元系统半导体膜具有大至约200nm的晶粒。 因此，载波的移动性增加。 其晶体硅在250℃至400℃的温度范围内生长。因此，当使用形成的晶体硅形成平面型薄膜晶体管，反向交错型薄膜晶体管或交错型薄膜晶体管时 在由二元系材料制成的这些膜上，其晶体管特性得到改善。 此外，当通过化学气相沉积法在薄膜晶体管的源电极和漏电极与连接到这些电极的硅膜之间形成含硅膜的杂质时，调节含杂质气体的流量，使得 随着接近源电极和漏电极的杂质密度变大，晶体管截止状态下的漏电流减小。 由于在这种情况下通过化学气相沉积法生长含有杂质的硅膜，因此可以容易地控制其杂质浓度，并且还提高了控制精度。