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公开(公告)号：US5898628A
公开(公告)日：1999-04-27
申请号：US842903
申请日：1997-04-17
申请人： Bruce Mielke , Matthew C. Hendricks
发明人： Bruce Mielke , Matthew C. Hendricks
IPC分类号： G01R31/319 , G11C7/10 , G11C7/00
CPC分类号： G01R31/31905 , G11C7/1006 , G01R31/31926
摘要： A method and apparatus for maximizing the data transmission rate from a source data path to selected channels of a destination data path having a different width from the source data path. In a preferred embodiment, the data transfer circuit includes at least one transfer register that is typically of the same width as the data source. Each bit from the transfer register is input to a plurality of multiplexers, each of which typically selects a single bit and outputs the selected bit to the destination.
摘要翻译： 一种用于使源数据路径的数据传输速率最大化到与源数据路径具有不同宽度的目的地数据路径的选定信道的方法和装置。 在优选实施例中，数据传输电路包括通常与数据源相同宽度的至少一个传送寄存器。 来自传送寄存器的每个位被输入到多个多路复用器，每个复用器通常选择一个位，并将所选择的位输出到目的地。
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公开(公告)号：US5893088A
公开(公告)日：1999-04-06
申请号：US716907
申请日：1996-09-19
IPC分类号： G06F17/30
CPC分类号： G06F17/30471 , G06F17/30495 , G06F17/30501 , Y10S707/99933
摘要： A system and method for performing complex queries in a database system. The method identifies a single type of entity in the database. A table or set of columns is formed that is used to track which entries meet the various subcriteria in a complex query through entry of binary marker bits. Logical operations may be performed on such marker bits to identify those entities meeting the specified search criteria. Through appropriate search planning, the bits may be "reused" during the query search. The method may be used in combination with, for example, index searches and other optimized searching techniques.
摘要翻译： 用于在数据库系统中执行复杂查询的系统和方法。 该方法识别数据库中单个类型的实体。 形成一列或多列，用于通过输入二进制标记位来跟踪哪些条目符合复杂查询中的各种子标准。 可以在这样的标记位上执行逻辑操作，以识别符合指定搜索条件的那些实体。 通过适当的搜索规划，在查询搜索期间这些位可能被“重复使用”。 该方法可以与例如索引搜索和其他优化的搜索技术组合使用。
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3.发明授权
公开(公告)号：US6076179A
公开(公告)日：2000-06-13
申请号：US790693
申请日：1997-01-29
申请人： Matthew C. Hendricks , Richard Swan
发明人： Matthew C. Hendricks , Richard Swan
IPC分类号： G01R31/319 , G01R31/28 , G06F11/00
CPC分类号： G01R31/31926
摘要： The present invention provides a method and apparatus for increasing the vector rate of an integrated circuit test system and simplifying the wiring of the tester to the device under test. The tester incorporates circuitry that allows the CPU to remap assignments of tester channels in the CPU address space during testing.
摘要翻译： 本发明提供一种用于增加集成电路测试系统的矢量速率并简化测试仪对被测器件的布线的方法和装置。 测试仪包含电路，允许CPU在测试期间重新映射CPU地址空间中测试仪通道的分配。
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公开(公告)号：US06195772B1
公开(公告)日：2001-02-27
申请号：US08850790
申请日：1997-05-02
申请人： Bruce F. Mielke , Matthew C. Hendricks , Howard Marshall , Richard Swan , Lee R. Althouse , Ken A. Ito
发明人： Bruce F. Mielke , Matthew C. Hendricks , Howard Marshall , Richard Swan , Lee R. Althouse , Ken A. Ito
IPC分类号： G01R3128
CPC分类号： G01R31/3016 , G01R31/2834 , G01R31/31727 , G01R31/31907 , G01R31/31922
摘要： An electronic circuit tester (e.g., for testing integrated circuit wafers or packaged integrated circuits) is provided. The tester is preferably based on a relatively inexpensive computer system such as a personal computer and includes at least one high-precision clock circuit that is programmable with respect to frequency and number of clock pulses. The high-precision clock circuit is connectable to the circuit being tested to permit certain timing-critical tests to be performed, even though a large number of other data channels in the tester are controlled by a relatively low speed clock circuit. The tester also includes analog circuitry that can be programmed to provide various analog signals suitable for performing parametric testing on an electronic device under test.
摘要翻译： 提供电子电路测试器（例如，用于测试集成电路晶片或封装的集成电路）。 测试器优选地基于诸如个人计算机的相对便宜的计算机系统，并且包括至少一个相对于时钟脉冲的频率和数量可编程的高精度时钟电路。 即使测试仪中的大量其他数据通道由相对较低速度的时钟电路控制，高精度时钟电路也可连接到被测电路，以允许执行一些定时关键测试。 测试仪还包括可编程的模拟电路，以提供适用于在被测电子设备上进行参数测试的各种模拟信号。
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公开(公告)号：US06180425B2
公开(公告)日：2001-01-30
申请号：US09121247
申请日：1998-07-23
申请人： Bruce Mielke , Matthew C. Hendricks
发明人： Bruce Mielke , Matthew C. Hendricks
IPC分类号： G01R3126
CPC分类号： G01R31/31905 , G01R31/31926 , G11C7/1006
摘要： A method and apparatus for maximizing the data transmission rate from a source data path to selected channels of a destination data path having a different width from the source data path. In a preferred embodiment, the data transfer circuit includes at least one transfer register that is typically of the same width as the data source. Each bit from the transfer register is input to a plurality of multiplexers, each of which typically selects a single bit and outputs the selected bit to the destination.
摘要翻译： 一种用于使源数据路径的数据传输速率最大化到与源数据路径具有不同宽度的目的地数据路径的选定信道的方法和装置。 在优选实施例中，数据传输电路包括通常与数据源相同宽度的至少一个传送寄存器。 来自传送寄存器的每个位被输入到多个多路复用器，每个复用器通常选择一个位，并将所选择的位输出到目的地。
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公开(公告)号：US5608337A
公开(公告)日：1997-03-04
申请号：US481744
申请日：1995-06-07
申请人： Matthew C. Hendricks , Ernest Allen
发明人： Matthew C. Hendricks , Ernest Allen
IPC分类号： G01R31/316 , G01R31/319 , H01L21/66 , G01R31/28
CPC分类号： H01L22/20 , G01R31/316 , G01R31/31905 , G01R31/31926 , H01L2924/0002
摘要： A method and apparatus for testing an integrated circuit device. An integrated circuit device undergoes testing in at least two different stages of the manufacturing process. At one stage, the semiconductor wafer containing multiple chip dice is probed by a probe tester that tests each of the dice individually. At another stage, after an individual chip die has been encapsulated in a package, a package tester tests and exercises the functions of the chip.
摘要翻译： 一种用于测试集成电路器件的方法和装置。 集成电路器件在制造过程的至少两个不同阶段进行测试。 在一个阶段，包含多个芯片骰子的半导体晶片由探针测试器探测，每个骰子单独测试。 在另一个阶段，在单个芯片芯片封装在封装中之后，封装测试器测试和运行芯片的功能。
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公开(公告)号：US5200920A
公开(公告)日：1993-04-06
申请号：US759944
申请日：1991-09-17
CPC分类号： G11C16/3459 , G11C16/10 , G11C16/3454
摘要： A method for programming programmable EPROM elements in programmable logic arrays. Multiple programming passes are made through the array, with the programming pulses decreasing in duration on each pass.
摘要翻译： 用于在可编程逻辑阵列中编程可编程EPROM元件的方法。 通过阵列进行多个编程遍历，编程脉冲在每次通过时持续时间减少。
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