公开(公告)号：US07323772B2

公开(公告)日：2008-01-29

申请号：US10233294

申请日：2002-08-28

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing segments having an electrically insulating layer that carries redistribution circuitry and redistributed bond pads and which is supported from beneath by a support layer are secured to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. The methods provide increased accuracy with which segments are placed on a semiconductor die relative to the placement accuracies provided when pick-and-place equipment is used to position conventional grid array substrates relative to semiconductor dice.

摘要翻译： 公开了根据使用常规引线框或引线锁带组装设备将栅极阵列型半导体器件封装中的半导体管芯封装的方法形成的半导体器件封装。 具有电绝缘层的电路承载部分固定到半导体管芯的有源表面，该电绝缘层承载再分配电路和再分布接合焊盘，并由支撑层从下面支撑。 支撑层可以包括导电材料，其可以用作用于封装的半导体器件的散热器或接地平面。 相对于使用拾取和放置设备来相对于半导体晶片定位传统格栅阵列基板时所提供的放置精度，这些方法提供了增加的精度。

公开(公告)号：US06865086B2

公开(公告)日：2005-03-08

申请号：US10191139

申请日：2002-07-09

申请人： Derek J. Gochnour ,  Walter L. Moden ,  Michael W. Morrison

发明人： Derek J. Gochnour ,  Walter L. Moden ,  Michael W. Morrison

IPC分类号： H01R31/06 ,  H05K5/02

CPC分类号： G06K19/07739 ,  H01R12/721 ,  H01R31/06

摘要： An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. The locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removable interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.

摘要翻译： 一种可拆卸地将小型存储卡与扩展构件互连的装置和方法。 锁定机构可以形成在缩小尺寸的存储卡的外围端部，其可以包括入口表面和凸缘。 延伸构件可以包括可滑动地接合进入表面的偏置部分和与凸缘的可移除的互连。 通过这种布置，扩展构件可以容易地从减小尺寸的存储卡中被固定和移除，从而允许一个电子设备的标准尺寸的插座与另一个电子设备的小型插座之间的容易的互换性。

公开(公告)号：US4349364A

公开(公告)日：1982-09-14

申请号：US316244

申请日：1981-10-29

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： C03B37/02 ,  C03B37/083 ,  C03B37/025

CPC分类号： C03B37/0206 ,  C03B37/0213 ,  C03B37/0216 ,  C03B37/083

摘要： A process for manufacturing glass filaments in which the bushing bottom plate has tips depending therefrom and each tip has a plurality of orifices from which glass filaments are drawn. The tips flood individually on start-up or during operation, and the flood results in a single composite filament being formed from the orifices of that tip. The composite filament beads down rapidly and is subsequently separated into individual filaments by the use of a fluid spray directed against the composite filament at the tip lower face. The fluid spray is utilized to momentarily quench the composite filament and is terminated once separation occurs. Subsequent filament drawing is accomplished without the use of a cooling fluid and by the use of known heat exchange means, e.g., a flow of cooling gas.

摘要翻译： 一种用于制造玻璃丝的方法，其中衬套底板具有从其顶端的尖端，并且每个尖端具有多个喷丝玻璃细丝的孔。 在启动或运行过程中，各个小窍门都会单独出现，而且洪水会导致单个复合细丝由该尖端的孔口形成。 复合长丝珠快速下降，并随后通过使用在尖端下表面处的针对复合长丝的流体喷雾而分离成单丝。 液体喷雾用于瞬时淬灭复合丝，并且一旦发生分离则终止。 随后的长丝拉伸是在不使用冷却流体的情况下实现的，并且通过使用已知的热交换装置，例如冷却气体流。

公开(公告)号：USD652211S1

公开(公告)日：2012-01-17

申请号：US29389541

申请日：2011-04-13

申请人： Michael W. Morrison ,  Carol M. Morrison

设计人： Michael W. Morrison ,  Carol M. Morrison

公开(公告)号：US20090278219A1

公开(公告)日：2009-11-12

申请号：US12116788

申请日：2008-05-07

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： H01L31/00 ,  H01L21/02

CPC分类号： H01L27/14625 ,  H01L27/14618 ,  H01L27/14685 ,  H01L2924/0002 ,  H01L2924/00

摘要： Microelectronic devices having an EMI shield, systems including such microelectronic devices, and methods for manufacturing such microelectronic devices. One embodiment of a microelectronic device comprises an imaging system comprising a microelectronic die, an optics assembly, and an electromagnetic interference (EMI) shield. The microelectronic die includes an image sensor, processing components electrically coupled to the image sensor, a first interconnect electrically isolated from the processing components, and a second interconnect electrically coupled to the processing components. The optics assembly is aligned with the image sensor, and the electromagnetic interference (EMI) shield is between the optics assembly and the processing components. The EMI shield is electrically coupled to the first interconnect.

摘要翻译： 具有EMI屏蔽的微电子器件，包括这种微电子器件的系统以及用于制造这种微电子器件的方法。 微电子器件的一个实施例包括包括微电子管芯，光学组件和电磁干扰（EMI）屏蔽）的成像系统。 微电子管芯包括图像传感器，电耦合到图像传感器的处理部件，与处理部件电隔离的第一互连以及电耦合到处理部件的第二互连。 光学组件与图像传感器对准，并且电磁干扰（EMI）屏蔽在光学组件和处理部件之间。 EMI屏蔽电耦合到第一互连。

公开(公告)号：US20080164600A1

公开(公告)日：2008-07-10

申请号：US12049741

申请日：2008-03-17

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device A semiconductor device and a semiconductor assembly are also provided.

摘要翻译： 公开了根据使用常规引线框或引线锁带组装设备将栅极阵列型半导体器件封装中的半导体管芯封装的方法形成的半导体器件封装。 具有电绝缘层的电路承载结构被配置用于固定到半导体管芯的有源表面，该电绝缘层承载具有再分布的接合焊盘和导电迹线的再分配电连接并且由支撑层从下方支撑。 支撑层可以包括导电材料，其可以用作用于封装半导体器件的散热器或接地平面。还提供半导体器件和半导体组件。

公开(公告)号：US07378736B2

公开(公告)日：2008-05-27

申请号：US10917904

申请日：2004-08-13

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： H01L23/48

CPC分类号： H01L24/49 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing segments having an electrically insulating layer that carries redistribution circuitry and redistributed bond pads and which is supported from beneath by a support layer are secured to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. The methods provide increased accuracy with which segments are placed on a semiconductor die relative to the placement accuracies provided when pick-and-place equipment is used to position conventional grid array substrates relative to semiconductor dice.

摘要翻译： 公开了根据使用常规引线框或引线锁带组装设备将栅极阵列型半导体器件封装中的半导体管芯封装的方法形成的半导体器件封装。 具有电绝缘层的电路承载部分固定到半导体管芯的有源表面，该电绝缘层承载再分配电路和再分布接合焊盘，并由支撑层从下面支撑。 支撑层可以包括导电材料，其可以用作用于封装的半导体器件的散热器或接地平面。 相对于使用拾取和放置设备来相对于半导体晶片定位传统格栅阵列基板时所提供的放置精度，这些方法提供了增加的精度。

公开(公告)号：US07233064B2

公开(公告)日：2007-06-19

申请号：US10797647

申请日：2004-03-10

申请人： Michael W. Morrison ,  Walter L. Moden ,  Corey Jacobsen

发明人： Michael W. Morrison ,  Walter L. Moden ,  Corey Jacobsen

IPC分类号： H01L23/04

CPC分类号： H01L21/00 ,  B33Y80/00 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor device assembly and method of making the devices are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of the electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

摘要翻译： 公开了半导体器件组件及其制造方法。 组件包括附接到导电层的半导体管芯，该半导体管芯又连接到承载电连接层的导电迹线的电介质层。 导电迹线提供分立的导电元件的阵列与连接到管芯的接合焊盘的接合线之间的连接。 导电层增强了组件的热传导和结构刚度。 此外，导电层提供可以连接到电源，接地源或中间参考电压的电压参考平面。 导电层还包括至少一个电流隔离槽，其分割导电层以帮助将导电层的一个区段中感应的噪声与其它区段隔离。

公开(公告)号：US07663224B2

公开(公告)日：2010-02-16

申请号：US11483905

申请日：2006-07-10

申请人： Michael W. Morrison ,  Walter L. Moden ,  Corey Jacobsen

发明人： Michael W. Morrison ,  Walter L. Moden ,  Corey Jacobsen

IPC分类号： H01L23/04

CPC分类号： H01L21/00 ,  B33Y80/00 ,  H01L23/3114 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49109 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor device assembly and method of making the device are disclosed. The assembly comprises a semiconductor die attached to an electrically conductive layer, which is, in turn, connected to a dielectric layer carrying conductive traces of an electrical connection layer. The conductive traces provide connection between an array of discrete conductive elements and bonding wires connected to bond pads of the die. The conductive layer enhances thermal conduction and structural stiffness for the assembly. In addition, the conductive layer provides a voltage reference plane that may be connected to a power source, a ground source, or an intermediate reference voltage. The conductive layer also includes at least one electrical current isolation slot, which segments the conductive layer to help isolate noise induced in one segment of the conductive layer from the other segments.

摘要翻译： 公开了半导体器件组件及其制造方法。 组件包括附接到导电层的半导体管芯，该半导体管芯又连接到承载电连接层的导电迹线的电介质层。 导电迹线提供分立的导电元件的阵列与连接到管芯的接合焊盘的接合线之间的连接。 导电层增强了组件的热传导和结构刚度。 此外，导电层提供可以连接到电源，接地源或中间参考电压的电压参考平面。 导电层还包括至少一个电流隔离槽，其分割导电层以帮助将导电层的一个区段中感应的噪声与其它区段隔离。

公开(公告)号：US07804168B2

公开(公告)日：2010-09-28

申请号：US12049741

申请日：2008-03-17

申请人： Michael W. Morrison

发明人： Michael W. Morrison

IPC分类号： H01L23/498

CPC分类号： H01L24/49 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. A semiconductor device and a semiconductor assembly are also provided.

摘要翻译： 公开了根据使用常规引线框或引线锁带组装设备将栅极阵列型半导体器件封装中的半导体管芯封装的方法形成的半导体器件封装。 具有电绝缘层的电路承载结构被配置用于固定到半导体管芯的有源表面，该电绝缘层承载具有再分布的接合焊盘和导电迹线的再分配电连接并且由支撑层从下方支撑。 支撑层可以包括导电材料，其可以用作用于封装的半导体器件的散热器或接地平面。 还提供半导体器件和半导体组件。