公开(公告)号：US20120091518A1

公开(公告)日：2012-04-19

申请号：US13270574

申请日：2011-10-11

申请人： Mitsunari SUKEKAWA

发明人： Mitsunari SUKEKAWA

IPC分类号： H01L29/78

CPC分类号： H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/91

摘要： A semiconductor device includes a semiconductor substrate having a first groove, a word line in the first groove, and a buried insulating film in the first groove. The buried insulating film covers the word line. The buried insulating film comprises a silicon nitride film.

摘要翻译： 半导体器件包括具有第一凹槽，第一凹槽中的字线和第一凹槽中的掩埋绝缘膜的半导体衬底。 掩埋绝缘膜覆盖字线。 掩埋绝缘膜包括氮化硅膜。

公开(公告)号：US20120080734A1

公开(公告)日：2012-04-05

申请号：US13314541

申请日：2011-12-08

申请人： MITSUNARI SUKEKAWA

发明人： MITSUNARI SUKEKAWA

IPC分类号： H01L27/108

CPC分类号： H01L28/90 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/10894 ,  H01L27/10897

摘要： A semiconductor memory device includes a memory cell portion and a peripheral circuit portion. The memory cell portion includes a pillar capacitor with a lower electrode, a dielectric film, and an upper electrode sequentially formed on a side surface of a first insulating portion which is parallel to a predetermined direction, and a transistor electrically connected to the lower electrode. The peripheral circuit portion includes a plate electrode, a cylinder capacitor with an upper electrode, a dielectric film, and a lower electrode sequentially formed on a side surface of the plate electrode which is parallel to the predetermined direction, and a transistor electrically connected to the lower electrode.

摘要翻译： 半导体存储器件包括存储单元部分和外围电路部分。 存储单元部分包括一个具有下电极的柱状电容器，一个电介质膜和一个顺序地形成在与预定方向平行的第一绝缘部分的侧表面上的上电极，以及一个与下电极电连接的晶体管。 外围电路部分包括平板电极，具有上电极的圆筒电容器，电介质膜和顺序地形成在平板电极的与所述预定方向平行的侧表面上的下电极，以及电连接到 下电极。

公开(公告)号：US08138094B2

公开(公告)日：2012-03-20

申请号：US12954448

申请日：2010-11-24

申请人： Mitsunari Sukekawa

发明人： Mitsunari Sukekawa

IPC分类号： H01L21/027

CPC分类号： H01L21/0337

摘要： Openings are formed in first and second mask layers. Next, diameter of the opening in the second mask layer is enlarged so that the diameter of the opening in the second mask layer becomes larger by a length X than diameter of the opening in the first mask layer. Thereafter, mask material is formed into the opening in the second mask layer, to form a cavity with a diameter X within the opening in the second mask layer. There is formed a mask which includes the second mask layer and the mask material having therein opening including the cavity.

摘要翻译： 开口形成在第一和第二掩模层中。 接下来，扩大第二掩模层中的开口的直径，使得第二掩模层中的开口的直径比第一掩模层中的开口的直径长大X。 此后，将掩模材料形成在第二掩模层中的开口中，以在第二掩模层的开口内形成具有直径X的空腔。 形成包括第二掩模层和掩模材料的掩模，其中具有包括该空腔的开口。

公开(公告)号：US20110294297A1

公开(公告)日：2011-12-01

申请号：US13067285

申请日：2011-05-20

申请人： Mitsunari Sukekawa

发明人： Mitsunari Sukekawa

IPC分类号： H01L21/311

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/76816 ,  H01L27/0207 ,  H01L27/10855

摘要： In a method of forming a dense contact-hole pattern in a semiconductor device, the method uses a self-align double patterning technique including forming a square or triangular lattice dot pattern on double layers of mask materials, forming first holes in the upper mask material and second holes wider than the first holes in the lower mask material by double patterning, additionally forming an insulating layer to a thickness such that the first holes are closed such that voids are left in the second holes, and transferring the shape of the voids to a base layer. The hole pattern formed thereby has a high precision, with a density thereof being double or triple that of a pattern formed by a lithography technique.

摘要翻译： 在半导体器件中形成致密接触孔图案的方法中，该方法使用包括在双层掩模材料上形成正方形或三角形点阵图案的自对准双重图案化技术，在上掩模材料中形成第一孔 以及通过双重图案化而比下掩模材料中的第一孔宽的第二孔，另外形成绝缘层至使第一孔闭合的绝缘层，使得空​​隙留在第二孔中，并将空隙的形状转移到 基层 由此形成的孔图案具有高精度，其密度是通过光刻技术形成的图案的两倍或三倍。

公开(公告)号：US06309960B1

公开(公告)日：2001-10-30

申请号：US09533033

申请日：2000-03-22

申请人： Mitsunari Sukekawa

发明人： Mitsunari Sukekawa

IPC分类号： H01L214763

CPC分类号： H01L27/10888 ,  H01L21/76897 ,  H01L27/1052 ,  H01L27/10894

摘要： In a method for fabricating a semiconductor device, this method comprising the steps of: forming a contact hole (208) so as to cause the etching stopper (205) on the substrate (201) to be exposed; removing an exposed etching stopper (205) on the substrate; filling the contact hole (208) to form a contact plug (210); removing a film (209) that is deposited on the interlayer insulation film (206), so as to expose the contact plug (210); etching the interlayer insulation film (206) and removing the etching stopper (205) on the gate electrode (203); forming an interlayer insulation film (211); etching the interlayer insulation film (211) so as to expose the etching stopper (205) on a diffusion layer (231) and etching the insulation film (204) of the gate electrode (203), so as to form contact holes (213) on the diffusion layer (231) and the gate electrode (203); removing the etching stopper (205) exposed on the diffusion layer (231); and filling the contact hole (213), so as to form the contact plugs (215).

摘要翻译： 在制造半导体器件的方法中，该方法包括以下步骤：形成接触孔（208）以使基片（201）上的蚀刻阻挡层（205）露出; 去除衬底上的暴露的蚀刻阻挡层（205）; 填充接触孔（208）以形成接触塞（210）; 去除沉积在层间绝缘膜（206）上的膜（209），以露出接触插塞（210）; 蚀刻层间绝缘膜（206）并去除栅电极（203）上的蚀刻停止器（205）; 形成层间绝缘膜（211）; 蚀刻层间绝缘膜（211），使扩散层（231）上的蚀刻阻挡层（205）露出，蚀刻栅极电极（203）的绝缘膜（204），形成接触孔（213） 在扩散层（231）和栅电极（203）上; 去除暴露在扩散层（231）上的蚀刻停止器（205）; 并填充接触孔（213），以形成接触塞（215）。

公开(公告)号：US20150287706A1

公开(公告)日：2015-10-08

申请号：US14438118

申请日：2013-09-13

申请人： Mitsunari SUKEKAWA

发明人： Mitsunari Sukekawa

IPC分类号： H01L25/18 ,  H01L27/108 ,  H01L23/532 ,  H01L23/528 ,  H01L27/088 ,  H01L23/48 ,  H01L25/065 ,  H01L23/544

CPC分类号： H01L25/18 ,  H01L23/481 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/544 ,  H01L23/642 ,  H01L25/0657 ,  H01L27/088 ,  H01L27/10805 ,  H01L27/10897 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprising: a first semiconductor chip provided with a first function, including a memory element but not including a peripheral circuit; first connection terminals provided in the first semiconductor chip; a second semiconductor chip provided with a second function, including a peripheral circuit but not including a memory element; and second connection terminals provided in the second semiconductor chip, wherein the first semiconductor chip and the second semiconductor chip are stacked on one another by causing the first connection terminals and the second connection terminals to come into contact with one another.

摘要翻译： 一种半导体器件，包括：具有第一功能的第一半导体芯片，包括存储元件，但不包括外围电路; 设置在第一半导体芯片中的第一连接端子; 具有第二功能的第二半导体芯片，包括外围电路，但不包括存储元件; 以及设置在第二半导体芯片中的第二连接端子，其中第一半导体芯片和第二半导体芯片通过使第一连接端子和第二连接端子彼此接触而彼此堆叠。

公开(公告)号：US08941162B2

公开(公告)日：2015-01-27

申请号：US13270574

申请日：2011-10-11

申请人： Mitsunari Sukekawa

发明人： Mitsunari Sukekawa

IPC分类号： H01L27/108 ,  H01L49/02

CPC分类号： H01L27/10814 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10891 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/91

摘要： A semiconductor device includes a semiconductor substrate having a first groove, a word line in the first groove, and a buried insulating film in the first groove. The buried insulating film covers the word line. The buried insulating film comprises a silicon nitride film.

摘要翻译： 半导体器件包括具有第一凹槽，第一凹槽中的字线和第一凹槽中的掩埋绝缘膜的半导体衬底。 掩埋绝缘膜覆盖字线。 掩埋绝缘膜包括氮化硅膜。

公开(公告)号：US20120149169A1

公开(公告)日：2012-06-14

申请号：US13397079

申请日：2012-02-15

申请人： Mitsunari Sukekawa

发明人： Mitsunari Sukekawa

IPC分类号： H01L21/02 ,  H01L21/768

CPC分类号： H01L21/0337

摘要： Openings are formed in first and second mask layers. Next, diameter of the opening in the second mask layer is enlarged so that the diameter of the opening in the second mask layer becomes larger by a length X than diameter of the opening in the first mask layer. Thereafter, mask material is formed into the opening in the second mask layer, to form a cavity with a diameter X within the opening in the second mask layer. There is formed a mask which includes the second mask layer and the mask material having therein opening including the cavity.

摘要翻译： 开口形成在第一和第二掩模层中。 接下来，扩大第二掩模层中的开口的直径，使得第二掩模层中的开口的直径比第一掩模层中的开口的直径长大X。 此后，将掩模材料形成在第二掩模层中的开口中，以在第二掩模层的开口内形成具有直径X的空腔。 形成包括第二掩模层和掩模材料的掩模，其中具有包括该空腔的开口。

公开(公告)号：US20110169061A1

公开(公告)日：2011-07-14

申请号：US12926559

申请日：2010-11-24

申请人： Mitsunari Sukekawa ,  Keisuke Otsuka

发明人： Mitsunari Sukekawa ,  Keisuke Otsuka

IPC分类号： H01L27/108 ,  H01L21/8242

CPC分类号： H01L27/10852 ,  H01L27/0207 ,  H01L27/10876 ,  H01L27/10894 ,  H01L28/91

摘要： The semiconductor device comprises a first region, a guard ring surrounding the first region, and a second region outside of the guard ring. The first region includes a first electrode made of a first film which has conductivity. A surface of the first electrode in the first region is not covered with the second film. The guard ring includes the first film covering an inner wall of a groove having a recess shape, and a second film as an insulating film covering at least one portion of a surface of the first film in the groove.

摘要翻译： 半导体器件包括第一区域，围绕第一区域的保护环和保护环外部的第二区域。 第一区域包括由具有导电性的第一膜制成的第一电极。 第一区域中的第一电极的表面不被第二膜覆盖。 防护环包括覆盖凹槽形状的槽的内壁的第一膜，以及覆盖槽中的第一膜的表面的至少一部分的绝缘膜的第二膜。

公开(公告)号：US20110059403A1

公开(公告)日：2011-03-10

申请号：US12877212

申请日：2010-09-08

申请人： Mitsunari SUKEKAWA

发明人： Mitsunari SUKEKAWA

IPC分类号： G03F7/20

CPC分类号： H01L21/32139 ,  H01L21/0337 ,  H01L27/10882 ,  H01L27/10894

摘要： A method of forming a pattern includes the following processes. A first lithography process is performed. The first lithography process is applied to a first region of a substrate. A second lithography process is performed. The second lithography process is applied to the first region and to a second region of the substrate, to form a first pattern in the first region, and to form a second pattern in the second region. The first pattern is defined by a first dimension. The first dimension is smaller than a resolution limit of lithography. The second pattern is defined by a second dimension. The second dimension is equal to or greater than the resolution limit of lithography.

摘要翻译： 形成图案的方法包括以下处理。 执行第一光刻工艺。 将第一光刻工艺应用于衬底的第一区域。 执行第二光刻处理。 将第二光刻工艺应用于第一区域和衬底的第二区域，以在第一区域中形成第一图案，并在第二区域中形成第二图案。 第一个模式由第一个维度定义。 第一维度小于光刻的分辨率极限。 第二个模式由第二个维度定义。 第二维度等于或大于光刻的分辨率极限。