公开(公告)号：US09590103B2

公开(公告)日：2017-03-07

申请号：US14990863

申请日：2016-01-08

申请人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

发明人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

IPC分类号： H01L29/78 ,  H01L29/165 ,  H01L27/088 ,  H01L29/08

CPC分类号： H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

摘要翻译： 半导体器件包括具有第一区域和第二区域的衬底，第一区域中的多个第一栅极结构，第一栅极结构彼此间隔第一距离，第二栅极结构在第二区域中形成多个第二栅极结构 所述第二栅极结构彼此间隔开第二距离，所述第一栅极结构的侧壁上的第一间隔物，所述第一间隔物上的介电层，所述第二栅极结构的侧壁上的第二间隔物， 间隔物在第二间隔物上。

公开(公告)号：US07911763B2

公开(公告)日：2011-03-22

申请号：US11923359

申请日：2007-10-24

申请人： Myung-II Kang

发明人： Myung-II Kang

IPC分类号： H01G4/005

CPC分类号： H01L23/5223 ,  H01L2924/0002 ,  Y10T29/413 ,  H01L2924/00

摘要： The present invention relates to a semiconductor device, and more particularly to a method for forming a metal/insulator/metal (MIM). The method comprises the steps of: forming a metal wiring surrounded by the inter-metal dielectric film; forming a plurality of insulating film on the metal wiring in sequence; and forming a metal barrier film on the insulating film, whereby the insulating film functioning as a buffer film can mitigate the stress between the films.

摘要翻译： 本发明涉及一种半导体器件，更具体地涉及一种用于形成金属/绝缘体/金属（MIM）的方法。 该方法包括以下步骤：形成由金属间介电膜包围的金属布线; 在金属布线上依次形成多个绝缘膜; 并且在绝缘膜上形成金属阻挡膜，由此用作缓冲膜的绝缘膜可以减轻膜之间的应力。

公开(公告)号：US20160343858A1

公开(公告)日：2016-11-24

申请号：US14990863

申请日：2016-01-08

申请人： Yoon Hae KIM ,  Jin Wook LEE ,  Jong Ki JUNG ,  Myung II KANG ,  Kwang Yong YANG ,  Kwan Heum LEE ,  Byeong Chan LEE

发明人： Yoon Hae KIM ,  Jin Wook LEE ,  Jong Ki JUNG ,  Myung II KANG ,  Kwang Yong YANG ,  Kwan Heum LEE ,  Byeong Chan LEE

IPC分类号： H01L29/78 ,  H01L27/088 ,  H01L29/08 ,  H01L29/165

CPC分类号： H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

摘要翻译： 半导体器件包括具有第一区域和第二区域的衬底，第一区域中的多个第一栅极结构，第一栅极结构彼此间隔第一距离，第二栅极结构在第二区域中形成多个第二栅极结构 所述第二栅极结构彼此间隔开第二距离，所述第一栅极结构的侧壁上的第一间隔物，所述第一间隔物上的介电层，所述第二栅极结构的侧壁上的第二间隔物， 间隔物在第二间隔物上。

公开(公告)号：US20070155152A1

公开(公告)日：2007-07-05

申请号：US11617197

申请日：2006-12-28

申请人： Myung II Kang

发明人： Myung II Kang

IPC分类号： H01L21/44

CPC分类号： H01L23/5227 ,  H01L21/76832 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： An inductor can be integrated with other components in a device formed on one semiconductor chip. The integrated circuit inductor has reduced electric resistance in the conductor and minimized influence on other circuit elements. A method of manufacturing the inductor which minimizes the area occupied by the inductor in a semiconductor chip allows the chip to be located in a small, narrow region along the edge of a chip, with coils which are vertically aligned with respect to the semiconductor substrate.

摘要翻译： 电感器可以与形成在一个半导体芯片上的器件中的其他部件集成。 集成电路电感器具有降低导体中的电阻并且对其它电路元件的影响最小化。 制造电感器的方法使半导体芯片中的电感器所占的面积最小化允许芯片沿着芯片的边缘位于小而窄的区域中，线圈相对于半导体衬底垂直取向。