公开(公告)号：US09590103B2

公开(公告)日：2017-03-07

申请号：US14990863

申请日：2016-01-08

申请人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

发明人： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung II Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

IPC分类号： H01L29/78 ,  H01L29/165 ,  H01L27/088 ,  H01L29/08

CPC分类号： H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

摘要翻译： 半导体器件包括具有第一区域和第二区域的衬底，第一区域中的多个第一栅极结构，第一栅极结构彼此间隔第一距离，第二栅极结构在第二区域中形成多个第二栅极结构 所述第二栅极结构彼此间隔开第二距离，所述第一栅极结构的侧壁上的第一间隔物，所述第一间隔物上的介电层，所述第二栅极结构的侧壁上的第二间隔物， 间隔物在第二间隔物上。

公开(公告)号：US20130001576A1

公开(公告)日：2013-01-03

申请号：US13611783

申请日：2012-09-12

申请人： Jong-Ki JUNG

发明人： Jong-Ki JUNG

IPC分类号： H01L29/78

CPC分类号： H01L29/458 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/74 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76843 ,  H01L29/41758 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

公开(公告)号：US08558316B2

公开(公告)日：2013-10-15

申请号：US13343280

申请日：2012-01-04

申请人： Jong-ki Jung

发明人： Jong-ki Jung

IPC分类号： H01L29/76 ,  H01L31/062

CPC分类号： H01L27/088 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/823475 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10894 ,  H01L27/14603 ,  H01L29/41783 ,  H01L29/6653 ,  H01L29/66636

摘要： A semiconductor device comprises a substrate, a gate structure formed on the substrate, a channel region below the gate structure in the substrate, a first source/drain region and a second source/drain region located at opposite side of the gate structure, a first lightly-doped drain (LDD) junction region formed between the first source/drain region and one end of the channel region, a second lightly-doped drain (LDD) junction region formed between the second source/drain region and the other end of the channel region, a metal silicide layer having a first metal formed on the first and second source/drain regions, an insulating layer formed on the metal silicide layer and the gate structure having a first opening to expose the metal silicide layer, and a conductive layer having the first metal and filling the first opening to contact the metal silicide layer.

摘要翻译： 半导体器件包括衬底，形成在衬底上的栅极结构，衬底中栅极结构下方的沟道区，位于栅极结构相对侧的第一源极/漏极区域和第二源极/漏极区域，第一 形成在第一源极/漏极区域和沟道区域的一端之间的轻掺杂漏极（LDD）结区域，形成在第二源极/漏极区域和第二源极/漏极区域的另一端之间的第二轻掺杂漏极（LDD） 沟道区，具有形成在第一和第二源极/漏极区上的第一金属的金属硅化物层，形成在金属硅化物层上的绝缘层和具有用于暴露金属硅化物层的第一开口的栅极结构，以及导电层 具有第一金属并填充第一开口以接触金属硅化物层。

公开(公告)号：US08304819B2

公开(公告)日：2012-11-06

申请号：US12769314

申请日：2010-04-28

申请人： Jong-Ki Jung

发明人： Jong-Ki Jung

IPC分类号： H01L29/76

CPC分类号： H01L29/458 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/74 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76843 ,  H01L29/41758 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating layer connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

摘要翻译： 一种由制造具有均匀厚度的细金属硅化物层的方法形成的器件，而不管衬底掺杂如何。 通过将硅衬底的无定形表面层与绝缘层分离而产生平面空位，金属源通过穿过与空位连接的绝缘层的接触孔进入空位，并且热处理将金属在 空位进入金属硅化物。 通过将非晶硅转化为晶体硅来诱导分离。

公开(公告)号：US20110084320A1

公开(公告)日：2011-04-14

申请号：US12769314

申请日：2010-04-28

申请人： Jong-Ki Jung

发明人： Jong-Ki Jung

IPC分类号： H01L29/78 ,  H01L21/768 ,  H01L21/3205

CPC分类号： H01L29/458 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/74 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76843 ,  H01L29/41758 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

摘要翻译： 一种由制造具有均匀厚度的细金属硅化物层的方法形成的器件，而不管衬底掺杂如何。 通过将硅衬底的无定形表面层与绝缘层分开来产生平面空位，金属源通过接触孔通过绝缘体进入空穴，稍后与空位连接，并且热处理将金属在 空位进入金属硅化物。 通过将非晶硅转化为晶体硅来诱导分离。

公开(公告)号：US20160343858A1

公开(公告)日：2016-11-24

申请号：US14990863

申请日：2016-01-08

申请人： Yoon Hae KIM ,  Jin Wook LEE ,  Jong Ki JUNG ,  Myung II KANG ,  Kwang Yong YANG ,  Kwan Heum LEE ,  Byeong Chan LEE

发明人： Yoon Hae KIM ,  Jin Wook LEE ,  Jong Ki JUNG ,  Myung II KANG ,  Kwang Yong YANG ,  Kwan Heum LEE ,  Byeong Chan LEE

IPC分类号： H01L29/78 ,  H01L27/088 ,  H01L29/08 ,  H01L29/165

CPC分类号： H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

摘要： A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

摘要翻译： 半导体器件包括具有第一区域和第二区域的衬底，第一区域中的多个第一栅极结构，第一栅极结构彼此间隔第一距离，第二栅极结构在第二区域中形成多个第二栅极结构 所述第二栅极结构彼此间隔开第二距离，所述第一栅极结构的侧壁上的第一间隔物，所述第一间隔物上的介电层，所述第二栅极结构的侧壁上的第二间隔物， 间隔物在第二间隔物上。

公开(公告)号：US08890163B2

公开(公告)日：2014-11-18

申请号：US13611783

申请日：2012-09-12

申请人： Jong-Ki Jung

发明人： Jong-Ki Jung

IPC分类号： H01L29/10 ,  H01L21/768 ,  H01L21/285 ,  H01L21/74 ,  H01L29/78 ,  H01L29/66

CPC分类号： H01L29/458 ,  H01L21/28512 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/74 ,  H01L21/76805 ,  H01L21/76834 ,  H01L21/76843 ,  H01L29/41758 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device formed from a method of fabricating a fine metal silicide layer having a uniform thickness regardless of substrate doping. A planar vacancy is created by the separation of an amorphousized surface layer of a silicon substrate from an insulating layer, a metal source enters the vacancy through a contact hole through the insulating later connecting with the vacancy, and a heat treatment converts the metal in the vacancy into metal silicide. The separation is induced by converting the amorphous silicon into crystalline silicon.

摘要翻译： 一种由制造具有均匀厚度的细金属硅化物层的方法形成的器件，而不管衬底掺杂如何。 通过将硅衬底的无定形表面层与绝缘层分开来产生平面空位，金属源通过接触孔通过绝缘体进入空穴，稍后与空位连接，并且热处理将金属在 空位进入金属硅化物。 通过将非晶硅转化为晶体硅来诱导分离。

公开(公告)号：US20120175707A1

公开(公告)日：2012-07-12

申请号：US13343280

申请日：2012-01-04

申请人： Jong-ki Jung

发明人： Jong-ki Jung

IPC分类号： H01L29/78 ,  H01L27/088

CPC分类号： H01L27/088 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/823475 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10894 ,  H01L27/14603 ,  H01L29/41783 ,  H01L29/6653 ,  H01L29/66636

摘要： A semiconductor device comprises a substrate, a gate structure formed on the substrate, a channel region below the gate structure in the substrate, a first source/drain region and a second source/drain region located at opposite side of the gate structure, a first lightly-doped drain (LDD) junction region formed between the first source/drain region and one end of the channel region, a second lightly-doped drain (LDD) junction region formed between the second source/drain region and the other end of the channel region, a metal silicide layer having a first metal formed on the first and second source/drain regions, an insulating layer formed on the metal silicide layer and the gate structure having a first opening to expose the metal silicide layer, and a conductive layer having the first metal and filling the first opening to contact the metal silicide layer.

摘要翻译： 半导体器件包括衬底，形成在衬底上的栅极结构，衬底中栅极结构下方的沟道区，位于栅极结构相对侧的第一源极/漏极区域和第二源极/漏极区域，第一 形成在第一源极/漏极区域和沟道区域的一端之间的轻掺杂漏极（LDD）结区域，形成在第二源极/漏极区域和第二源极/漏极区域的另一端之间的第二轻掺杂漏极（LDD） 沟道区，具有形成在第一和第二源极/漏极区上的第一金属的金属硅化物层，形成在金属硅化物层上的绝缘层和具有用于暴露金属硅化物层的第一开口的栅极结构，以及导电层 具有第一金属并填充第一开口以接触金属硅化物层。